Processed SiC Wafer and packaged die from Ascatron

As detailed in the discussion of Power Electronics converter design is a complex system of tradeoffs between performance, efficiency, size, reliability, and other metrics. When selecting semiconductor power devices to implement a converter, the characteristics of each device need to be considered, including how they will impact the overall system.

For a known converter application and operating point, the selection of transistor and diode devices will determine both the conduction and switching losses incurred during operation. For a given technology, the fabrication of the power device can be altered to improve one of these losses, but always at the detriment of the other. To reduce the conduction losses of a MOSFET, multiple devices can be placed in parallel, but doing so will increase the number of switching devices, and therefore the switching energy loss. The relationship between these two losses can be controlled through either the device structure, or the materials used to create it.

The first semiconductor power devices were created around the 1950s, replacing earlier vacuum tube power conversion approaches to power conversion. This marked the beginning of power electronics as a field. The field has since been revolutionized by the creation of the bipolar junction transistor in the early 1960s, the power MOSFET in the late 1970s, and the IGBT in the mid 1980s. Each of these devices has had continual adjustments and improvements to its basic structure, gradually advancing the achievable performance of each. Until the early 2000s, all commercial devices relied on silicon as the base semiconductor material.[1]

Through the early 2000s, and continuing today, the techniques and equipment necessary to utilize new materials in the fabrication of power semiconductor devices have advanced to the point that commercial WBG devices are available at competitive prices, in quantities enabling deployment to end-user applications. Despite a nearly 50 year headstart on device fabrication techniques, many of these WBG devices out-perform their modern silicon-based counterparts due to the superior characteristics of the materials.

In the following section, a brief overview of semiconductor operating principles will be used to motivate the material advantages of wide bandgap semiconductors

#### Introduction to Semiconductor Operation

Semiconductors, in general, are materials whose conduction characteristics lie somewhere in between those of conductors and insulators. For use as electronic devices, specific properties of semiconductor devices are used which allow their conduction characteristics to be controlled by both (1) material composition, and (2) application of external electrical fields.

Crystal lattices of silicon semiconductors with (left-to-right) no dopant, donor dopant, and acceptor dopant[2]

When fabricated in bulk, semiconductor materials such as silicon have conduction characteristics very near that of an insulator. Silicon atoms have four valence electrons; in a monocrystalline silicon wafer, the atoms will form a crystalline lattice in which all four are tied in covalent bonds with adjacent silicon atoms, resulting in no unbound electrons or holes which can act as a carrier for electrical current. In order to modify the conduction characteristics of bulk silicon, impurities known as dopants are introduced to the silicon crystal. When an atom with five valence electrons is introduced, the atom will form covalent bonds with the four adjacent silicon atoms, leaving one free electron. When an atom with three valence electrons is instead placed into the lattice, only three covalent bonds will form. This missing bond produces a hole in the crystal lattice, which a free electron can occupy if it has the same energy as the other valence electrons in the lattice. These two classes of dopants are called donors and acceptors, respectively. Images of the lattice in each case, and the undoped silicon lattice, are shown in the figure to the right. A semiconductor doped with a higher concentration of acceptors is termed p-type, whereas a high number of donors results in n-type semiconductor.

In both $$p$$ and $$n$$-type semiconductor, the dopant contributes a free charge carrier, which is now able to move about the lattice. Therefore, higher doping concentrations will increase the conductivity of the material. It is important to note that the presence of free carriers is not indicative of a net charge of the material. Each atom, individually, is charge neutral, and each free carrier gained by adding a dopant will result in an equal and opposite bound charge in the dopant atom.

Discrete energy bands formed in a doped extrinsic semiconductor

Energy band diagrams of conductor, semiconductor, and insulator materials

Energy band theory examines the effect of free charges by considering the quantum energy bands, or orbitals, around an atom in which electrons may exist. The figure at left shows an example atomic band diagram. The space between these discrete energy levels is known as a band gap, which is an energy at which no electron may exist. For semiconductor analysis the band gap between the valence band and conduction band energy levels is of the most interest. electrons above this band gap, in the conduction band, or holes below it, in the valence band, are free carriers, capable of moving throughout the material, whereas others remain bound in place. The bandgap energy is the amount of energy which must be supplied to an electron to move it from the valence to conduction band. The Fermi level of a material is the energy level which has a 50% probability of being occupied by an electron.

In insulators, the bandgap energy is large, so free carriers are not readily generated, resulting in a large electrical resistance to current flow. In conductors, the valence and conduction bands overlap, and free carriers are spontaneously generated without external energy being supplied. Semiconductors have a moderate bandgap, in which a small amount of energy supplied to the material can readily generate free carriers, altering the conductivity of the material significantly.

Heterojunctions occur at the interface between two different materials. At right, a progression of figures is used to show the change in band diagrams that occurs as two different semiconductor materials are doped, then joined together. In the top figure, both materials are undoped. Semiconductor 2 has a wider bandgap than semiconductor 1, and both have Fermi levels in the center of the energies of the valence and conduction bands. In the middle figure, semiconductor 1 has been doped with donor atoms, resulting in an $$n$$-type material. The excess of free electrons has shifted the Fermi level towards the conduction band, relative to the intrinsic (undoped) level. Semiconductor 2 is doped $$p$$-type. In the final figure, the two semiconductors are joined together. With no external field, the Fermi level must remain constant throughout the material; if there is any difference in the average energy level of carriers, this would result in current flow, with the higher energy carriers moving to occupy the lower energy states. The p-n junctionshown here is the basis for a diode, perhaps the most simple semiconductor switching device.

#### The p-n Junction in Equilibrium

Intrinsic energy diagrams of two undoped semiconductor materials

Energy diagrams after semiconductor 1 has been doped n-type, and semiconductor 2 p-type

Energy diagrams after the two doped materials have been joined together

For this junction, electrons in the $$p$$-type material can freely flow from the higher-energy $$E_{c2}$$ conduction band to the lower-energy $$E_{c1}$$ band. Similarly, holes may move freely from $$E_{v1}$$ to $$E_{v2}$$. However, due to the type of doping in each material, there is a dearth of free electrons in the $$p$$-type material and free holes in the $$n$$-type material. In the figure at left, the forces acting on electrons near the $$p$$-$$n$$ junction are shown. Theoretically, if the two materials were joined instantaneously, as shown in the top figure, diffusion would force the electrons into the $$p$$-type material due to high concentration of electrons in the $$n$$-type material and the low concentration of electrons in the $$p$$-type material. Similarly, holes would diffuse from the $$p$$-type material into the $$n$$-type. As electrons leave the $$n$$-type material, they leave behind bound positive charges, which create an electric field near the junction. The electric field $$\vec{E}$$ created by this net charge imbalance results in drift, or force drawing electrons toward the bound positive charge and holes toward the bound negative charge. In equilibrium, these two forces balance, resulting in a small region devoid of any free charges near the heterojunction. This region is known as the depletion region. Once established, any carriers which cross the depletion region experience a change in energy equal to the potential difference across the junction.

Net motion of free carriers near the heterojunction after instantaneous joining

Depletion region forming in an equilibrium p-n junction in equilibrium. Only electron forces shown.

Poisson's equation can be used to analyze the electric potential $$\varphi$$ which occurs due to the depletion region. In electrostatics, Poisson's equation is expressed as $${\nabla}^2 \varphi = \frac{-\rho_f}{\epsilon}$$ where $$\rho_f$$ is the charge density, and $$\epsilon$$ is the material permitivity. To analyze this heterojunction, we can assume that the material is uniform in the $$y$$ and $$z$$ dimensions, and only consider the $$x$$ (horizontal on screen) dimension. In one dimension, Poisson's equation becomes $$E = \frac{\partial V}{\partial x} = \int_0^x\frac{-\rho_f}{\epsilon}dx .$$ The charge density $$\rho_f$$ takes on two values. Recall that in the semiconductor material outside the depletion region, there is no net charge; all free carriers are balanced by equal and opposite bound charges. It is only in the depletion region that the exposed bound charges create a net field. In the $$n$$-type material, $$\rho_f=q\cdot{n_D}$$ where $$q$$ is the unit charge and $$n_D$$ is the doping density of the material, in donors per unit length. In the $$p$$-type material, $$\rho_f=q\cdot{n_A}$$, with $$n_A$$ the density of acceptors per unit length in this material. To solve this equation, we define the reference potential to be zero everywhere outside the depletion region. Then, the solution for the electric field $$E(x)$$ at any point on the $$x$$-axis becomes $$E(x) = \begin{cases} \frac{-q\cdot{n_D}}{\epsilon}\left(x+x_n\right) & -x_n \lt x \lt 0 \\ \frac{q\cdot{n_A}}{\epsilon}\left(x-x_p\right) & 0 \lt x \lt x_p \\ 0 & \text{otherwise} \end{cases}$$

Depletion region in the case where $$n_D=n_A$$

Depletion region in the case where $$n_D=\lt n_A$$

Plots of electric field for both cases

At right, two cases are plotted: first, the nominal case there $$n_D=n_A$$, and second, the case where $$n_D=\lt n_A$$, or the doping density in the $$n$$-type material is much less than that of the $$p$$-type material. In the latter case, we label the $$n$$-type material as $$n^-$$, denoting that it is only lightly doped. In this case, the depletion region extends further into the $$n$$-type material in order to expose the same amount of bound charge in the depletion region. Note that, by doping the $$n^-$$-type material more lightly, the peak value of the electric field in the semiconductor is reduced.

Integrating once more, we can solve the electric potential (voltage) $$V$$ in the material, defining a reference potential of zero at the junction barrier $$V(x) = \begin{cases} \frac{-q\cdot{n_D}{x_n}^2}{2\epsilon} & x>-x_n \\ \frac{-q\cdot{n_D}}{\epsilon}\left(\frac{x^2}{2}+x\cdot{x_n}\right)& -x_n \lt x \lt 0 \\ \frac{q\cdot{n_A}}{\epsilon}\left(\frac{x^2}{2}-x\cdot{x_p}\right) & 0 \lt x \lt x_p \\ \frac{q\cdot{n_A}{x_p}^2}{2\epsilon} & x>x_p \end{cases}.$$ Note that there is a built-in junction voltage, $$V_0=\frac{q}{2\epsilon}\left(n_D{x_n}^2+n_A{x_p}^2\right)$$ across the depletion region.

Depletion region in the case where $$n_D=n_A$$

In equilibrium, this $$p$$-$$n$$ junction remains insulating. That is, no current can flow between the two materials of the device due to the expansive depletion region, devoid of free charge carriers. In order for carriers to cross this region, energy needs to be supplied to them in order to cross the energy barrier of this built-in junction potential.

#### The p-n Junction Under External Bias

In electronic devices, external electrical fields are used to supply the energy necessary to alter the conduction characteristics of semiconductor materials. To consider the effect of external fields on the $$p$$-$$n$$ junction, the figure at right considers the characteristics of the materials with no external applied field, then voltage sources applied in either polarity across the material.

p-n junction in equilibrium. At right, the magnitudes of drift and diffusion currents are equal, resulting in no net current flow.

p-n junction under reverse-biased operation

p-n junction under forward-biased operating conditions

##### Equilibrium Operation

In equilibrium, as analyzed previously, there is a net balance of carrier movement due to drift and diffusion, giving rise to a steady-state charge distribution which exhibits a depletion region. The carriers do no remain static; instead, there is constant motion of electrons in holes in either direction. The motion of charges is current, which is defined by convention with positive current indicating the direction of flow of positive charges. $$I_D$$ is defined as the current due to carrier diffusion, and $$I_S$$ the current due to carrier drift. In equilibrium, the motion of charges (current) due to drift (negative charges moving from the $$p$$ to $$n$$ regions and the opposite for positive charges) and the current due to diffusion (negative charges moving from $$n$$ to $$p$$ region and the opposite for positive charges), $$I_D = I_S$$.

##### Reverse Bias

In the middle figure, $$V_r$$ is a voltage applied to the $$p$$-$$n$$ junction in a polarity that will result in reverse-biased operation. Initially, the source $$V_r$$ supplies a current $$I_r$$ which will result in holes being added to the $$n$$-type material and electrons added to the $$p$$-type material. As free holes are supplied to the $$n$$-type material, they will immediately recombine with the free electrons which are at a high concentration in the material, resulting in the elimination of free carriers and uncovering additional bound charges. Analogous behavior occurs in the $$p$$ region. If $$V_r$$ is not large enough to break down the material, the system will eventually reach a steady state where the additional uncovered charges increase the depletion region width enough so that the voltage across it nearly balances $$V_r > V_0$$, and little-to-no current $$I_r$$ flows in steady-state. Under reverse bias operating conditions, the $$p$$-$$n$$ junction is said to be blocking, i.e. can withstand voltage without allowing current to flow.

Note that as a larger voltage $$V_r$$ is applied, the depletion region expands proportionally, uncovering an equal amount of charge. This implies that the junction charge is dependent upon the voltage $$V_r$$, and there is some relationship $$\frac{\Delta{Q}}{\Delta{V_r}} = C_d$$, which by definition is a capacitance. In the reverse-biased operating region, we can consider this device to be a capacitor, requiring some transient current to charge the capacitance (and increase the depletion region), but eventually reaching a steady-state with nearly zero current.

##### Forward Bias

Under forward bias operation, shown in the bottom figure, a voltage $$V_f$$ is applied to the junction in the opposite polarity. The resulting current $$I_F$$ now supplies holes to the $$p$$ region and electrons to the $$n$$ region. By increasing the concentration of majority carriers in each region, the amount of current due to diffusion will increase. Additionally, the amount of current due to drift will decrease slightly, as the excess carriers in each region will neutralization some of the exposed bound charges in the depletion region, narrowing its width slightly. This will continue until an equilibrium state is reached in which all currents balance, $$I_F = I_D-I_S$$. In the forward-biased region, the junction is said to be conducting, as it will allow significant current to flow in the direction of $$I_F$$

This net current develops due to the diffusion current exceeding the drift current. This implies that there is greater movement of holes from the $$p$$ to the $$n$$ region than in the opposite direction, and opposite for electrons. These holes are injected across the depletion region barrier, into the $$n$$ region. As the holes continue to move through the $$n$$-type material, they gradually recombine with free electrons. The result is a significant increase in minority carriers near the edge of the depletion region in both materials, which gradually tapers off further into the material. The $$p$$-$$n$$ junction is said to be a minority carrier device, because when it conducts current, the current is sustained by the motion of holes into the $$n$$-type material and electrons in the $$p$$-type material.

The amount of free minority carriers available to sustain the current will influence the conductivity of the material. As the amount of current $$I_F$$ increases, the diffusion current increases, and thus the concentration of minority charges increases, allowing very high currents to be sustained without a significant increase in the terminal voltage. This effect is known as conductivity modulation, which reduces the amount of energy loss exhibited at high currents by increasing the conductivity of the material. One issue with this design is that the junction will exhibit <reverse recovery. In order to move from forward bias to reverse bias operating regions, the excess minority carrier charge in each region must be removed. In order to remove this charge quickly, the current $$I_F$$ must go negative for a short time, while the diode remains in the forward-biased operating region. In many switching converters, this negative current can result in significant power loss.

#### The Schottky Diode

An alternative to the $$p$$-$$n$$ diode shown previously, the Schottky diode shown at right is a majority carrier device. The Schottky is formed through the interface of conductor and semiconductor, rather than two different semiconductors.

Schottky diode circuit symbol and semiconductor cross-section

Depending on the relative Fermi levels, semiconductor-metal junctions can be either Schottky or ohmic contacts. Ohmic contacts allow carriers to move freely between the two materials. Schottky contacts have a significant energy gap associated with the material interface, and will require a change in energy of the carriers in order to cross.

A Schottky diode, shown at right, uses both Schottky and ohmic contacts. The junction between the top metal and lightly doped $$n$$-type semiconductor is designed to have a built in junction potential, similar to that in the $$p$$-$$n$$ junction. The $$n^-$$-$$n^+$$ homojunction and the $$n^+$$-metal junction are conductive. Because no $$p$$-type material is used, only electrons act as carriers. This means that the Schottky diode will be a majority carrier device.

Work Functions of Metals
Material $$\Phi_M$$ [eV]
Silver 4.26 – 4.74
Gold 5.1 – 5.47
Copper 4.53 – 5.10
Aluminum 4.06 – 4.26
Platinum 5.12 – 5.93

Electron Affinity of Semiconductors
Material $$\chi$$ [eV]
Silicon 4.01
Germanium 4.13
Gallium Arsenide 4.07
Silicon Carbide 3.17-3.57
Gallium Nitride 4.1

The energy band diagrams of the Schottky diode materials are shown below. Before the materials are joined, energy states are aligned relative to the vacuum energy level. Two metals are used, with different work functions $$\Phi_{Mi}$$, which are dependant on the material properties, relative to the electron affinity of the semiconductor. Because the metals are conductors, they have no bandgap, and can be drawn simply as a single energy level of abundant free carriers. Once joined and in equilibrium, the Fermi levels of all materials align, and the energy bands bend near the junctions. At the Metal 2 to $$n^-$$ interface, a Schottky junction with barrier height $$\Phi_B = \chi-\Phi_{M2}$$ is formed, whereas at all other interfaces electrons can freely move from right-to-left. The $$n^+$$ region, though not explicitly necessary for Schottky behavior, is often used in order to decrease the contact resistance at the ohmic contact.

Energy diagrams of two metals and two different doping concentrations in one semiconductor material prior to connection

Equilibrium energy band diagram after joining materials

Unlike the $$p$$-$$n$$ diode, conductivity modulation does not occur in the Schottky diode. The conductivity of this structure depends only on the geometry and doping concentration of the semiconductor material, and does not change as current increases. At very large currents, the Schottky diode will exhibit considerable more energy loss due than the $$p$$-$$n$$ diode. However, the lack of this effect also means that it will not exhibit reverse recovery.

The simple structure of the Schottky diode facilitates analysis of the performance limits of semiconductor materials, which will be examined in the following section.

#### Performance Limits of Semiconductor Materials

Taking the previous Schottky diode as an example, we can examine the limitations on the performance of semiconductor materials. Though this discussion will be framed in reference to the Schottky diode, it is generally applicable to 1-D majority carrier devices, including FETs.

Performance of the Schottky will be determined by a number of metrics including

• $$V_{BR}$$ Breakdown voltage: the maximum reverse voltage $$V_r$$ which the device can remain reverse-biased
• $$R_D$$ Resistance: the incremental resistance of the diode in the forward bias region
• $$C_D$$ Capacitance: the incremental capacitance of the diode in reverse bias

Each of these parameters can be altered through the device, though often at the detriment of others.

#### Breakdown Voltage

Reverse bias voltage and Electric Field

Schottky diode in reverse bias

Semiconductor materials have a critical electric field, $$E_{crit}$$, which they are capable of withstanding without breaking down. If, while in reverse bias, the peak electric field within the semiconductor exceeds this value, the diode will lose its ability to block voltage and have significant current flow. For the Schottky diode, Poisson's equation can again be used to analyze the electric field, however, no electric field exists inside the conductor. Taking the previous equations for voltage and electric field in the range $$-x_n \lt x \lt 0$$. Rather than the previous extension into the $$p$$-region, an equal and opposite surface charge will develop on the metal at the Schottky junction to balance the exposed depletion region charge. $$E(x) = \frac{-q\cdot{n_D}}{\epsilon}\left(x+x_n\right)$$ and $$V(x) = \frac{-q\cdot{n_D}}{\epsilon}\left(\frac{x^2}{2}+x\cdot{x_n}\right)$$ the electric field occurs at $$x=0$$, and the voltage across the depletion region is the difference between the potential at each edge, $$V(x=0)-V(x=x_n)$$. As stated before, the width of the depletion region $$x_n$$ depends on the voltage applied. We can now solve for the maximum reverse voltage which the device can withstand by setting $$E(x)=E_{crit}$$ and solving for the voltage which will result in the material exceeding this value. $$E_{crit} = \frac{-q\cdot{n_D}}{\epsilon}x_n$$ $$V_r = \frac{q\cdot{n_D}}{\epsilon}\left(\frac{{x_n}^2}{2}\right)$$ solving for $$x_n$$ in the former, and plugging into the latter, we get $$V_{BR} = \frac{-q\cdot{n_D}}{\epsilon}\left(\frac{{\left( \frac{E_{crit}\epsilon}{q\cdot{n_D}}\right)}^2}{2}\right) = \frac{{E_{crit}}^2\epsilon}{2q\cdot{n_D}}$$ The breakdown voltage of the device depends on material characteristics $$E_{crit}$$ and $$\epsilon$$, but also depends inversely on the doping density $$n_D$$. Thus, for a given material, a high voltage device will require a low doping density. Plugging back into the original equation, this breakdown voltage requires that the depletion region expand to a length $$x_{n^-\text{min}} = \sqrt{\frac{2\epsilon \left|V_{BR}\right|}{q\cdot{n_D}}}$$ When creating the diode, the length in the $$x$$-direction of the $$n^-$$ region must be greater than or equal to this value to sustain a reverse voltage of $$V_{BR}$$.

#### Resistance

Next, consider the resistance of the diode in forward bias operation. The total resistance of the diode will comprise of resistances due to each of the materials and their contact resistance. However, relative to the large, lightly doped $$n^-$$ region, the carrier-dense $$n^+$$ region and metal contacts often contribute relatively little resistance. This is particularly true in high voltage devices. The resistance of a material is given by $$R = \rho\frac{l}{A}$$ where $$\rho$$ is the material resistivity, $$l$$ the length in the direction of current conduction, and $$A$$ the cross-sectional area. For this analysis in one dimension, we will consider the specific resistance of the material, $$R_{sp} = R\cdot{A} = \rho\cdot{l}$$, which normalizes with respect to cross-sectional area. This is a useful step, as the area of the diode can be made arbitrarily large to reduce resistance. For a semiconductor material, the resistivity is given by $$\rho = \frac{1}{\mu_n{n_d}q}$$ where $$\mu_n$$ is the permeability of the material. Taking $$l=x_{n^-\text{min}}$$ as the minimum length of the $$n^-$$ region to obtain a breakdown voltage $$V_{BR}$$ derived previously, the specific resistance of the diode is approximated by $$R_{sp} = \rho{x_{n^-\text{min}}} = \sqrt{\frac{2\epsilon \left|V_{BR}\right|}{\left(q\cdot{n_D}\right)^3{\mu_n}^2}}$$ as a final step, we can replace $$q\cdot{n_D}$$ according to the expression derived earlier for $$V_{BR}$$ in order to determine the minimum specific resistance achievable at a given breakdown voltage. This is considered "optimal doping" for a uniform doping density, as the doping density $$n_D$$ is set to the largest possible value which can still block a required voltage. $$R_{sp} = \sqrt{\frac{2\epsilon \left|V_{BR}\right|}{\left(\frac{{E_{crit}}^2\epsilon}{2V_{BR}}\right)^3{\mu_n}^2}}$$ and simplify to $$R_{sp} = \frac{4{V_{BV}}^2}{{\mu_n}\epsilon{E_{crit}}^3}$$ The denominator, $${\mu_n}\epsilon{E_{crit}}^3$$ is known as Baliga's Figure of Merit [3]. It can be used to compare different materials, based on their permittivity, permeability, and critical electric field, in terms of their achievable resistance when designed to block a certain voltage. Note that, for a given die size and material, if the operating voltage doubles, the resistance will increase by a factor of 4

#### Capacitance

The junction capacitance exhibited by the diode when reverse biased can be solved in a similar manner. First, consider the definition of capacitance, $$C = \frac{Q}{V}$$. Considering only the incremental behavior in response to a small change in voltage around a DC bias $$V_r$$, the small-signal capacitance can be defined as $$C_d(V_r) = \frac{\partial{Q}}{\partial{V}}$$. The difference will become clear as the capacitance of the diode is derived.

The charge being supplied to and drawn from the device in the reverse bias region is equal to the total charge in the depletion region. With uniform doping density, the depletion region total charge is $$Q_{tot} = q\cdot{n_D}x_nA$$, i.e. the charge density multiplied by the volume of the depletion region. The same equation used to solve $$x_{n^-\text{min}}$$ can be applied again for an arbitrary reverse voltage $$V_r$$, rather than specifically the breakdown voltage, to get $$\frac{Q_{tot}}{A} = q\cdot{n_D}\sqrt{\frac{2\epsilon \left|V_{r}\right|}{q\cdot{n_D}}} = \sqrt{2\epsilon \left|V_{r}\right| q\cdot{n_D}}$$ Note that this analysis neglects the built-in junction potential, $$V_0$$. The specific junction capacitance, $$C_{sp} = \frac{C_d}{A}$$ is used to normalize by the device die area, as in the resistance analysis. It can be found by taking the partial of this equation with respect to $$V_r$$ $$C_{sp}(V_r) = \frac{\partial Q_{tot}}{\partial V_r} = \sqrt{\frac{\epsilon q \cdot n_D}{2\left|V_{r}\right|}}$$ Notice that the capacitance is inversely proportional to the square root of the applied voltage. This nonlinear capacitance exhibited in the off-state is typical of electronic devices. It can be understood by envisioning the depletion region edges as two plates of a parallel plate capacitor, where as the applied voltage increases, the depletion region expansion equates to moving the parallel plates further apart. To further simplify, we can again consider optimal doping to eliminate $$q\cdot{n_D}$$. $$C_{sp}(V_r) = \frac{\epsilon{E_{crit}}}{2\sqrt{\left|V_{r}V_{BV}\right|}}$$

In the previous sections, equations for specific resistance and capacitance were derived. Though the length in the $$x$$-dimension is constrained by the designed breakdown voltage, the area $$A$$ in the $$y$$-$$z$$ plane is unconstrained. As the area is increased, the diode resistance $$R_D$$ will decrease proportionally, but the capacitance will increase. By multiplying the specific capacitance and specific on-resistance, we can cancel out the dependence on $$A$$ and obtain another figure of merit. For simplicity, we will take the value of the capacitance at the breakdown voltage $$C_{sp}(V_{BV}) \cdot R_{sp} = R_DA\frac{C_D}{A} = R_DC_D = \frac{2V_{BV}}{\mu_n{E_{crit}}^2}$$
Because both $$R_D$$ and $$C_D$$ are parasitic elements in a power semiconductor, the quantity $$R_DC_D$$ is a value to be minimized. Thus, better performing power electronics devices are possible at lower voltages $$V_{BV}$$ and when using materials with high values of $$\mu_n$$ and $$E_{crit}$$. Both of these changes will improve the achievable switching-vs-conduction loss tradeoff in a power converter. Additionally, alternate approaches such as different device structures, different converter topologies, lower switching frequencies, or alternate modes of operation can be used in certain scenarios to improve these tradeoffs.
There are a few limitations to this analysis. First, only the drift region resistance was considered. For devices with $$V_{BR}$$ in the 100's of volts and beyond, this approximation will be very accurate, but in low voltage devices, the metal, contact, and $$n^+$$ resistances may be significant. Second, only a device structure in which the material is uniform in the $$y$$ and $$z$$-dimensions has been considered. This is known as a unipolar device structure. Modern techniques for device fabrication, including superjunction devices, can surpass this limit by allowing the electric field to expand in two dimensions, rather than just one.