#### Electric Vehicles and Aerospace

• The objective of the research is to develop and optimize an integrated converter prototype for 50 kW traction operation as boost converter and 6.6 kW charging operation as dual active bridge (DAB) converter. A scaled down prototype is first developed to verify the reconfigurable integrated converter operation and loss verification. The boost converter is operated in current interleaving mode to reduce the capacitor requirement. Phase shift modulation is adopted for DAB converter. The unique aspect of the design is to incorporate a hybrid high frequency integrated magnetics which can be operated as DC boost inductor and AC isolation transformer for dual active bridge converter. The magnetizing inductance of the hybrid high frequency integrated transformer is used for boost operation and the leakage inductance is used for the DAB converter operation. A model for finite element analysis (FEA) is developed to evaluate the leakage and magnetizing inductance for different winding and core configurations. Based on the leakage and magnetizing inductance, an analytical converter model is developed to predict the transformer current waveforms and output power. To achieve the highest efficiency for different operating conditions, a loss model is developed for efficiency optimization.

Due to the bidirectional power flow capability of DAB converter, it can be operated in both charging operation and traction operation. Since the integrated converter can drive the traction motor as both boost and DAB mode, they are designed independently for highest efficiency at light load and full load condition. For most integrated converter topologies presented in literature, extra mechanical or solid-state contactor is required for reconfiguration which adds cost and increases the volume of the converter. In the proposed integrated converter, reconfiguration between DAB and boost mode is achieved by switching the BMS contactors which are already available in EVs. However, the time required to reconfigure the converter between boost and DAB modes are high due to the mechanical contactors. A trapezoidal modulation scheme is developed to ensure seamless power flow during the mechanical contactor transition time. The modulation scheme ensures the reliability of the BMS contactor and prevents overshoots. Using targeted design approach based on consumer driving habits and drive cycle statistics, the topology provides a unique way to design and optimize independently EV efficiency for different torque-speed requirement.

##### Students
• Saeed Anwar
##### Faculty

• The understanding and modeling of switching transient is crucial here. At the core of this problem is the nonlinear and high-order nature of power semiconductor switching behavior. Significant amount of work is spent into identification of components defining switching characteristics and verification of a simulation model. Furthermore, elaborate the switching behavior testing under different working condition and circuit parameters is done to further determine their contribution and prove the knowledge we gained from modeling. Based on these fundamentals, the design and operation of WBG based power converter can be scientifically optimized.

Overvoltage is the ringing spikes exerted on semiconductor during switching transients and the device voltage rating is usually limited by the maximum magnitude. While an empirical percentage value is usually used for the selection of silicon counterparts, the design guideline proposed here help using the most out of the device reliably.

Dead-time is usually inserted between the switching actions of the switching pair to avoid shorting the dc bus voltage to ground and often it is a fixed operation parameter. With the knowledge of current commutation inside the switching pair, we are able to optimize and adaptively tune this parameter by monitoring the switching time. Therefore, operation safety is guaranteed while reducing the diode conduction loss at the same time.

• Wen Zhang
• Jeff Dix
• Jacob Dyer
##### Faculty

• This project focuses on the development of an intelligent gate drive (IGD) by means of multiple gate assist units to accommodate the unique characteristics of WBG power semiconductors. The proposed IGD will feature: a) smart driving strategy to achieve fast switching, and minimized voltage spike and parasitic ringing simultaneously; b) cross-talk suppression; c) fast response short-circuit protection; d) online junction temperature monitoring; and e) online switching time detection. The proposed IGD will help to fully realize the benefits of WBG devices in a converter, while minimizing their negative impact on design and operation complexity and reliability.

• Wen Zhang
• Jeff Dix
• Jacob Dyer
##### Faculty

• The goal of this project is to build a 1-MW cryogenically cooled inverter with 99.3% efficiency at half power and 26 kW/kg specific power. The main technical barriers include highly-efficient power conversion stage and ultra-light EMI filter for MW-level high frequency cryogenically-cooled power conversion system. These challenges enable the following research opportunities, including but not limited to driving, protection, and characterization of power semiconductor at low temperature, characterization of passives at low temperature, topology, control, and PWM algorithm, advanced EMI filter strategy, cryogenic cooling system, packaging and integration. Also, additive manufacturing is employed to further improve the performance and reduce the weight of the power conversion system.

##### Students
• Ruirui Chen
• Craig Timms
• Jordan Sangid
• Handong Gui
• Geoff Laughon
##### Faculty

• The first step would be to continue design and evaluation on the Gate Driver IC developed previously in order to integrate as many board level circuits into the IC as possible. The second step is to continue design and testing of the isolated power supply IC. The third step is the continuation of switching transient overvoltage modeling. The fourth step is the development of the junction temperature monitoring for SiC based power converters. This fourth step provides for a lifetime enhancement and better reliability of the power converter. The fifth step is the integration of the work done on the previous steps.

##### Students
• Daniel Merced Cirino
• Wen Zhang
• Jeff Dix
##### Faculty

• This project investigates the impact of parasitics when paralleling GaN to Si, particularly on the gate-drive performance, quantifies the crosstalking between Si and GaN gate drivers, and enhances the thermal performance of such module by paralleling Si MOSFETs, and analyzes the economic impact of adopting such hybrid power module in EV chargers. ANSYS is used to optimize the PCB layout, LTSpice is used to simulate the transient in the driver and switching modules, and the physical charger is built to experimentally validate its effectiveness.

• Liyan Zhu
##### Faculty

• The charger input is a three-phase boost type PFC. The DC/DC stage uses dual active bridges, adopting single-phase-shift control at the heavy load and dual-phase-shift control at the light load to secure soft switching on. Si MOSFETs from various vendors are compared, in terms of the electrical performance and the cost impact

• Yang Huang
• Liyan Zhu
##### Faculty

• Among many WPT coil structures, the series SR coil has been studied carefully for its many superiority over others. Instead of using Litz wire for inductor winding and lumped capacitor as compensated resonant component, SR coil consists of planar inductors made of copper foil. No Litz wire is needed and SR coil can utilize its parasitic capacitance as the compensation network. The total volume of passive component could shrink largely comparing with conventional coil at a given power rating.
Nevertheless, AC copper loss dominates the total ESR, diminishing the performance of SR coil especially at high operating frequency. Moreover, the specific designed capacitance value requires a certain amount of copper area provided by the planar inductor trace, limiting any method to cut down the copper loss. Aiming at increasing the copper area with the given capacitance value constraint, a multi-layer non-uniform SR coil structure has been proposed. Multiple layers of planar inductor are stacked up, with dielectric material in between any two adjacent layers. A 100mm radius multi-layer prototype has been fabricated using ceramic-filled PTFE laminate to prove the validity of this concept. The fabricated coil can reach quality factor over 200, which is almost doubled comparing with 2-layer uniform width SR coil. It has been tested with a 6.78MHz high frequency full bridge inverter in the lab and shows constant characteristics as expected.

##### Students
• Ruiyang Qin
• Andrew Foote
• Jie Li
##### Faculty

• As the power levels of wireless power transfer for electric vehicles rise, it becomes increasingly important to maximize the efficiency of the system while meeting design constraints such as stray-field inside or outside the vehicle extents, misalignment tolerances, and vehicle ground clearances. This project seeks to design wireless charging system with all of these in mind. Recently, is has been shown that more complex coil geometries, such as three-phase bipolar coils [4], can enable higher power levels under stray field limits vs. traditional circular or rectangular coils. Coil geometry design has been accomplished with finite element analysis (FEA) approaches and analytical methods. FEA-based methods often rely on brute-force iteration with full or partial 3D-modeling of parameterized coils in a specified geometry and many analytical methods are pertinent only to circular or rectangular coils.
This research project is focused on developing a new analytical method to rapidly design WPT systems with complex coil shapes for various objectives and constraints. The method directly designs WPT coil magnetic fields and currents to meet performance objectives and constraints through the optimization of Fourier basis function weights of varying spatial frequencies. Similar approaches have been applied in the design of MRI gradient coils, and electric machines. In the field of WPT, this method has many benefits and does not assume a specific coil geometry, number of turns, or rely on iterative finite-element analysis (FEA) simulations. After the continuous coil shape is optimized, the method can determine coil conductor paths and accurately predict self and mutual inductance for a desired number of turns and calculate the DC-DC losses for various gauges of wire and switching devices. This allows for convenient multi-objective optimization of a broad variety of coil shapes, operating frequencies, and DC-link voltages. Early stages of this project will validate the accuracy of this model with a 6.6kW prototype system.

##### Students
• Andrew Foote
##### Faculty

• This project will connect the evaluation board of Xilinx FPGA with a SiC inverter in CURENT and apply the common-mode reduction control method to the selected FPGA emulation board). Detailed plan includes: building the Matlab/Simulink model for several control algorithms, generating the FPGA code to the emulation board, developing the software and integrating it into existing FPGA SW, and testing the control algorithm on the SiC inverter based PMSM drive set in CURENT. Meanwhile other advanced control algorithms, including multiple-phase motor control, simultaneous multiple motor control, high-frequency harmonic injection sensorless control will be investigated, to maximize the benefits of SiC and FPGA.

• Yang Huang
##### Faculty

• The UTK team will simulate and compare different charger topologies/concepts at 3.3kW, 6.6kW, 22kW and an 'all-in-one' that can do all the power levels. Firstly, the project will focus on investigating different charger topologies from literature, market and novel ideas. Thereafter, different topologies will be compared in terms of cost, efficiency, weight, power density, etc. and then few of them will be selected for simulation at 3.3kW, 6.6kW, 22kW and 'all-in-one charger'. Finally, based on simulations, an optimal charger design will be suggested at each power level. The target specs include:

• Power Factor at rated power: > 0.99
• Grid-side Current THD < 5%
• Efficiency estimate: >95%
• Output current ripple: <5%
• Operating temperature range: -20~110oC
• Operating voltage range: 80~260V for single phase, 208~480VAC for three phase
• Output voltage range: 200~500VDC
• Rated charging power: 3.3kW~20kW
• Voltage mode / Current mode: Constant Current & Constant Voltage Charging
• No inrush current
• Cooling method: Water cooling
• Bidirectional power flow: plus

##### Students
• Nick Bianchi
• Daniel Merced Cirino
##### Faculty

• Advanced low inductance packaging and chip interconnect on a DBC sintered design or similar isolated set-up is the primary target. The goal is to investigate several options to physically place the bare dies or chip-scale pre-packaged dies on the substrate ensuring low inductance of the overall package. Different chip packaging technologies (die attach, wire bonding/ribbons, Ag sintering, pre-packaging) and process challenges with respect to fabrication is to be investigated. Substrate selection and trade-off (incl. organic substrates) with respect to electric/thermal properties and thermal reliability as well as process handling in production. It is desired to have different designs with different materials ready for power and thermal cycling tests. A criterion for evaluation is the breakdown voltage on one side and the expected relative thermal resistance change after power/thermal cycling on the other side.

##### Students
• Nathan Strain
##### Faculty

• The UTK team will simulate and compare different topologies & concepts. After that the UTK team will lay out the circuit, code the control algorithm in TI DSP then do the high-power test. Given SiC devices have much higher switching frequency than Si, using SiC at the high-voltage side can potentially reduce the size of the transformer and input/output filter. For the low-voltage side undertaking high current, Si devices are adopted to reduce the cost and maintain competitively low conduction loss. The targeted system efficiency is ~97% and the power density is ~3kW/L, much higher than the presently existing 0.6~1kW/L and 92% efficiency, respectively.

• Liyan Zhu
##### Faculty

• The UTK team will work with Mercedes-Benz team to simulate the six-phase motor control and externally excited motor control. After that, the UTK team will lay out the SiC inverter, code the control algorithm in Xilinx FPGA and do the high-power test using high-power dyno in CURENT. Given SiC devices have much higher switching frequency than Si, it can potentially reduce the differential-mode current while yielding higher common-mode voltage current. The project expects to generate a mixed PWM pattern under different speed/torque scenarios to comprehensively reduce the common-mode and differential-mode current, all implemented in the high-resolution FPGA.

##### Students
• Ximu Zhang
• Jared Walden
##### Faculty

• The final deliverable of this project is an integrated DCDC with OBC. The system will be designed to meet the OEM vehicle specifications and safety standards. More specifically, the team proposes two stage design. Phase 1: Literature review, simulation and comparison. At this stage, the team will process the "paper" design by investigating, simulating and comparing the various topology. This will help the UTK and company better understand the component selection, design limit and cost of various topology. The best topology will then be selected for Phase 2: Prototyping and testing, when the team will then design, prototype and test the circuit to validate the proposed topology.

##### Students
• Changchieh Lo
• Liyan Zhu
##### Faculty

• The key technology involved includes: 1) ceramic insulation. A thin layer of ceramics is sandwiched between two copper layers. In this way, all G, D and S terminals of GaN devices are insulated from the heatsink. The first-layer copper connections are used to internally connect the top-switch S terminal with the D terminal of the bottom switch. The second layer of the copper is directly attached to the heatsink. Thermal grease can be used for better attachement, which however still yields much lower thermal impedance compared to state-of-art TIMs. Silicon gel will be used to fill the package for mechanical support and insulation; 2) smart PCB, which is essentially a multi-layer PCB with the decoupling cap to form the flux cancelling loop to offset the potential parasitic inductance. In addition, the gate-drive circuit of top and bottom switches, including the needed power supply are soldered on this PCB. Only PWM signals for top and bottom switches, i.e., PWM/T and PWM/B are to be provided by the control system. All connectors of this smart PCB will be directly soldered on the external control and power PCBs. Compared to bottom cooled devices using IMS, which essentially is one-layer board introducing high parasitic inductance, the proposed packaging approach adopts the extra multi-layer PCB to realize flux canceling. Compared to discrete switches, soldering dies in one package to form a half bridge yields much higher compactness.

##### Students
• Yu Yan
• Ziwei Liang
• Jared Walden
##### Faculty

• Coil design plays a critical role for any high efficiency, high power density, low cost and robust WPT system. Among many WPT coil structures, the SR coil has many advantages for MHz range applications. Based on the multi-turn spiral SR coil structure, a multi-layer non-uniform SR coil with series resonance is proposed, improving the quality factor by distributing the source current among multiple layers while maintaining a multi-turn structure with large inductance. The proposed structure can be implemented with varying size and number of turns, making it applicable in WPT systems for consumer electronics and electric vehicles. Compared to the conventional SR coil designs, it has the advantages of high inductance, high quality factor, and exhibits a series L-C resonant characteristic.
The structure of a three-layer case is shown in the attached picture. Three layers of copper spiral traces are stacked vertically, with two layers of dielectric material sandwiched between. Similar to the two-layer case, the current will flow from terminal a on the top layer, to the terminal b on the bottom layer. In the multi-layer structure, the current will distribute between the three layers, but at any point along the length of the spiral, the sum of the currents in each of the three layers is equal to the source current. As the current gradually transitions from terminal a to terminal b, it must flow through both dielectric layers in series. Together with the inductance from spiral coils, the three-layer coil still works as a series L-C resonant network.

##### Students
• Ruiyang Qin
• Jingjing Sun
##### Faculty

• The design and testing of this project is done as part of a collaboration with Wolfspeed and Ford Motor Vehicles. Throughout the design process, power electronics topologies and concepts will be compared and simulated, including power losses and efficiency as well as modeling of magnetic components. Control strategy will be simulated and included in a field programmable gate array (FPGA).

##### Students
• Daniel Merced Cirino
• Liyan Zhu
• Yang Huang
• Ziwei Liang

#### Renewable Energy and Energy Storage

• PV inverters are a hot topic in power electronics research today, focusing on cost and size reduction, efficiency and reliability improvements, and added features like reactive power support. This figure shows a typical single-phase PV inverter architecture, including the transistors (Q1-Q4), gate drivers, and filter. The filter is usually composed of inductors and capacitors, which can make up a large portion of the inverter size and cost. In addition to the components shown here, auxiliary electronics are required to provide regulated voltage levels, control signals, and protection. The transistors and passive components also require a heatsink or cooling system to keep them within their rated operating temperature range.

One way to improve an inverter is to select a new topology, as opposed to the conventional hard-switching full-bridge converter shown here. But even with the same topology, the size and cost of filters can be greatly reduced by increasing the switching frequency of the transistors. However, higher frequency causes higher switching losses, which reduces the inverter efficiency and requires a larger heatsink to keep the transistors from overheating. This tradeoff is at the heart of PV inverter research.

This projects aims to design a lower cost PV inverter using GaN-based power electronics, which maintaining the same capabilities, efficiency, size, and design margins for reliability as in todayâ€™s commercially available products. In order to achieve this goal, the key research areas include design of the gate drivers, heatsink, control, and filter, as well as the topology and layout of the inverter.

##### Students
• Edward Jones
• Paige Williford
##### Faculty

• This project develops the power electronics interfaces with renewable energy sources and control strategies needed for active voltage and frequency regulation, as shown in Fig. 1. Using the developed model and control strategies, capabilities of these renewable energy sources with interface converters are investigated, including active and reactive power, voltage, inertia, and impedance characteristics.

The project also develops the stability criterion and design methodology of renewable interface converters to guarantee the stable operation of power systems with high penetration of renewable energy sources, such as a grid-connected radial-line PV system with multiple PV inverters. The harmonic stability of grid-integrated renewable energy systems is analyzed using the impedance-based stability criteria. Based on the stability analysis, the converter controller parameters are designed to ensure the system stability without harmonic resonance problems.

##### Students
• Wenchao Cao
• Yiwei Ma
##### Faculty

• The University of Tennessee (UTK) in partnership with the Electric Power Research Institute (EPRI) previously built a 2 kVA single-phase inverter with ultra-high power density (102 W/in3) using WBG devices. The inverter power stage and overall system size were minimized through a multi-faceted approach. During the design stage of the project, many different approaches were analyzed through complete paper designs to compare total displacement volume. This included alternate energy storage implementations, converter topologies, switching frequencies, and device and passive materials. However, complete in-house static and switching performance characterization of multiple WBG devices, including thermal variations in key parameters, allowed for the miniaturization of the final design.

Building up on the 2kVA single phase inverter previously developed for the contest, we are developing new approaches that can be implemented to further improve the current topology.

##### Students
• Chongwen Zhao
• Ling Jiang
• Kamal Sabi
##### Faculty

• Traditional interleaved converters can be further improved by adding other distinctive functionalities and features into its operation, e.g. operating the converter in DCM mode, applying ZVS or ZCS etc. An effort will be made to propose a more improved topology of buck boost interleaved converter which will incorporate innovative features resulting in reduced loss and smooth converter operation.

This high power buck boost type dc-dc converter needs to withstand high voltage (600 V), and high output current (maximum 400 A). To share this high current, N number of parallel stages will be designed. These stages will also be phase shifted to achieve advantages like input and output voltage ripple cancellation, improved load transient response, etc.

As the number of interleaved stages increases, the control complexity increases too. The main challenge of this research would be to implement innovative ideas into the operation and control circuitry of this converter that would led to a very smoothly controlled and efficient converter. Designing proper cooling system would also be crucial issue of this research.

Prior to hardware implementation of this converter, detailed analysis of the converter steady state operation, and mathematical modelling of converter dynamics incorporating losses will be done.

##### Students
• Manashi Roy
• Mark Nakmali

#### Utility Applications

• Two types of HVDC converters are used, the current source converters (CSC) and the voltage source converters (VSC). VSC-HVDC has the advantages of low harmonics, black start capability and independent active and reactive power control, which make it suitable for the growing renewable energy resources integration applications, such as offshore wind farm. The state-of-the-art VSC-HVDC converter topology is the modular multilevel converter (MMC), as shown in the figure. MMC exhibits many advantages, such as no direct series of power switches due to the modular structure with a series connection of power electronics building blocks (i.e. submodules), and high efficiency and low harmonics due to the multilevel structure.

However, MMC requires large submodule capacitors due to the single-phase nature of the submodules and low switching frequency. It also has an inherently uneven power loss distribution between the two devices in the submodule, which may lead to overdesign of the cooling system. These shortcomings of MMC may hinder their applications where size and weight are important, such as for offshore wind.

This project aims to increase the MMC power density, by proposing methods to reduce the capacitor voltage ripples and deal with the uneven power loss distribution in submodules.

##### Students
• Shuoting Zhang
• Siqi Ji
• Xiaojie Shi
• Yalong Li
##### Faculty

• The proposed microgrid is expected to improve the energy use efficiency by 20% and reduce the annual critical loads interruption time by 98% from 50 minutes to 1 minute. At the same time, the controller and its deployment cost can be cut by half. The community based microgrid and its controller will help the proliferation of the microgrid technology, which can lead to 1% reduction of the total CO2 emission by electricity generation in US if widely used.

There are two main phases for the project, the design phase and the testing phase. The design phase will focus on the MG design, implementation, and design methodology development, as well as the MG controller development. The testing phase will focus on testing the designed and developed MG and MG controller using multiple simulation and emulation platforms, as well as the controlled field testing. During the testing phase, technology to market activities will be conducted on commercialization of the developed open source low cost MG controller.

##### Students
• Xiaojie Shi
##### Faculty

• The project focuses on the development of a power electronics based dc current controller (DCC) for continuously variable series reactors (CVSRs) to continuously vary the line reactance and control the power flow on the transmission and distribution system. Compared with FACTS series compensation devices, DCC only performs control function, is isolated from the high voltage ac line and can be of much lower voltage and power rating, ultimately reducing the system cost. But a regulated dc current from 0 to 1000 A must be supplied by the DCC under different ac load and dc flux bias conditions, which is a big challenge due to the non-linear characteristic relationship between induced back-emf and dc current. Furthermore, high reliability is critical for acceptance in utility applications. To minimize maintenance, a natural convection cooling system instead of forced air cooling is required and poses additional restrictions for the topology and device selection.

##### Students
• Sheng Zheng
• Jingxin Wang
##### Faculty

• This research focusses on building a 6 kW residential photovoltaic single-phase string inverter that is reliable, robust, efficient, and low cost. Traditional PV converter topologies are implemented using single-purpose power stages and passives. A conceptual DHA system is implemented with a common set of hardware resources that shift operation between active power filtering (APF: double-line-frequency decoupling) and line frequency inverter operation. A plurality of identical modules comprises the shared hardware resources. According to a dispatch controller, each module in the DHA system is either a buck-type APF (with embedded energy storage) or a zero voltage switching (ZVS) inverter phase leg, in each case controlled through a low frequency current reference. The system uses a dual-current programmed mode (DCPM) control to achieve ZVS of all transistor while regulating peak and valley currents in each period. This modulation results in large ripple, particularly at high output current, which is mitigated simply by the multiphase nature of the DHA, allowing reduced EMI filtering. The modular DHA structure also allows ripple energy storage capacitors to be embedded at the module level, breaking the energy storage into smaller and therefore more reliable banks, and allowing the system to be devoid of a single point of failure.
The ongoing research is also looking at optimally sizing the APF energy storage capacitors and the optimal operation of each modules between APF and inverter operation. With separate inverter and APF operation, power stages of each must be sized according to the individual maximum instantaneous power of each. When completed, the proposed research will demonstrate a paradigm-altering approach to power electronics design, applied to PV inverters.

• Kamal Sabi
##### Faculty

• The auxiliary power supply (APS) is required to withstand high insulation voltage of 20 kV. Different topologies for the power supply are examined. Transformer design and insulation material that offers reliable insulation voltage are compared. The goal is to build a compact and standardized APS with high power density so that it can be easily placed with the power electronic submodule in MV converter. The APS will be built and then tested under hi-pot and partial discharge test to validate its insulation voltage. Another target of the APS is to achieve a interwinding capacitance smaller than 5 pF, which reduces the common mode current imposed by the high dv/dt during device switching. The capacitance can be calculated and simulated using ANSYS Maxwell. Finally, the capacitance is tested using impedance analyzer.

##### Students
• Min Lin
• Xingxuan Huang
##### Faculty

• This project involves the power loss analysis of PV inverters [1], electrothermal modeling of PV inverters [2], and lifetime estimation of PV inverters [3].

The power loss distribution among inverter semiconductors varies with respect to different output power factor (PF). In IGBT-diode type of PV inverters, providing reactive power will reduce the conduction loss of IGBTs and increase the conduction loss of diodes which increases the diode thermal stress because the equivalent current that flows through the diodes increases as the PF decreases. The theoretical analysis of power loss distribution is researched in this project. The power loss distribution among inverter semiconductors are verified in PLECS simulation.

Semiconductor losses are typically cycling in a fundamental cycle. In addition to the average power loss, the power loss variation during a fundamental cycle also varies with power factor. The average losses determine the mean junction temperature (Tj). The power loss variation in a fundamental cycle determines the junction temperature variation (âˆ†Tj). Both junction temperature and temperature variation greatly influence the lifetime of a semiconductor. This project analytically derives the conduction loss of the semiconductors and shows the results that the junction temperature variation of inverter diodes will increase as the output power factor decreases. The junction temperature variation of semiconductors is evaluated in PLECS simulation.

In addition to loading condition, the inverter filtering inductor will also change the actual inverter power factor and indirectly influence the current distribution of the semiconductors. This project also studies the effect of filtering inductor on the current distribution of semiconductors.

##### Students
• Paychuda Kritprajun
• Yunting Liu
##### Faculty

• A typical issue with high penetration of residential solar energy is the overvoltage at the customer side. The high penetration of residential PV will increase the voltage at customer side as the reverse power flow happens. To maintain the customer-side voltage within acceptable range, IEEE std. 1547 requires the DERs to provide reactive power to regulate local voltage profile [5].

To study the residential PVs impact on the distribution system, the following methodology has been adopted:

• Modify available IEEE test feeders (IEEE8500) with high penetration of residential PV.
• Develop detailed model of secondaries and incorporate with simulation study. The secondary modeling is focused on services transformers and building cables.
• Implement Volt-Var/Volt-Watt control recommended from IEEE std. 1547.

A three-phase residential reactive power compensator is validated by simulation as a possible solution to deal with residential overvoltage issue [6]. The proposed three-phase reactive power compensator adopts innovative dc capacitor-less solid-state variable capacitor (SSVC) concept to minimize the dc-link capacitor.
Full bridge inverters typically need bulky electrolytic dc capacitors to absorb the unbalanced power from the ac side. These electrolytic capacitors normally have shorter lifetime than other components in the converter. In most full-bridge inverter applications, the dc voltage is required to be relatively constant. However, in reactive power compensation applications, such as SSVC, maintaining a constant dc-bus voltage is unnecessary since the dc bus is floating. The three-phase residential reactive power compensator adopted in this project removes the electrolytic dc capacitor from the circuit by releasing the constraints on dc bus voltage fluctuation. The dc voltage is supported by ac side voltage directly. For this residential reactive power compensator, the capacitance needed is only 3% of that required by a conventional three-phase inverter. The three-phase residential reactive power compensator is validated by simulation.

##### Students
• Yunting Liu
##### Faculty

• Typically, starting motor is required high inrush current for several seconds. MATLAB/Simulink is utilized to simulate the transient conditions. For starting motor, most major motor starting techniques including autotransformer starter, star/delta starter, soft starter, and direct online starter with ZIP loads are implemented. The saturated transformer model is also included in the system to study inrush current during the transient condition. Once combining these transient conditions, the current and time of the overall system will be obtained. Therefore, the VSIâ€™s capacity must be designed for these conditions to be able to continuously operate during the transient conditions.

##### Students
• Nattapat Praisuwanna
##### Faculty

• To be able to coordinate with centralized control system, an adapter for each platform is required. This project mainly focuses on controlling and monitoring real and reactive power of non-utility inverters owned by the customers. Enabling the voltage support from an inverter by integrating a transactive approach, VOLTTRONTM agents are developed to be a distributed controller for the non-utility inverter [1]. NATS is a publish and subscribe messaging system, and it has been used for the communication between the OpenFMB message bus and the outside platforms which enables peer to peer communication among the devices. Each device can receive data based on the subscription topics. This peer-to-peer idea reduces the latency of direct communication between a centralized controller and devices, which normally includes delay time. Two VOLTTRONTM agents are designed to complete specific tasks as follows.

1. Inverter Modbus Agent

The inverter modbus agent is developed to form the connection between the VOLTTRON platform and an inverter, which is using modbus TCP/IP for communication. The inverter parameters such as voltage, current, and power are read from modbus registers of the inverter. These data are published to the VOLTTRON message bus for the inverter control agent to subscribe these data and then uses these data to achieve other tasks, such as constructing a DERâ€™s supply curve and updating the inverter data into the OpenFMB module. The agent can also subscribe to the control signals from the message bus for setting new operating points, which are real and reactive power of the inverter.

2. Inverter Control Agent

The inverter control agent is designed to be the connection between VOLTTRONTM and OpenFMB harness. The agent can send the inverter data to OpenFMB model via NATS. In part of the Transactive Energy System (TES), the inverter control agent is also designed to be the connection between VOLTTRONTM and TES in order to subscribe to the transactive signal and publish data which are required from TES.

Raspberry Pi with installed VOLTTRONTM agents is used for demonstration of this project. Each Raspberry Pi represents a distributed controller of each DER. After the transactive signal is sent by the TES for requesting the support from customers, multiple DERs will submit their own DERâ€™s supply curve for bidding. When the market is cleared, cleared price will be sent to each DER. Individual DER will dispatch the power based on its individual price curve to support reactive power for improving voltage in the system.

##### Students
• Paychuda Kritprajun

#### Medical Devices

• In this research, a new modulation scheme, which can simultaneously generate two different ac frequencies while suppressing undesired harmonics in between, is first proposed and systematically investigated, and then the proposed modulation is verified on a 100 W prototype. Second, the band-pass filters that are employed to separate different frequencies from the inverter are designed and compared to achieve better filtering effect. Next, advanced filter network involving planar transformer design will be conducted to further minimize the system volume as well as to modeling the parasitic effect of filtering network. Finally, the leakage current caused by high order harmonics will be addressed using the proposed modulation scheme, and corresponding modification and tradeoffs will be studied in the stage.
Modulation Scheme Study
Two different modulation schemes, unipolar and bipolar dual-frequency selective harmonic elimination (DFSHE), are investigated. Compared to traditional PWM modulation, which controls only the fundamental frequency of the output waveform through modulation of duty cycle at constant frequency, selective harmonic elimination (SHE) modulation varies both switching frequency and duty cycle per switching period in order to generate an output in which a large range of the output spectrum is directly controlled. The SHE method uses Fourier analysis, based on the desired output spectrum, to synthesize a pulse train, consisting of a number of discrete switching instances. Each switching instance is defined by switching angles relative to the fundamental period. In this work, the SHE method is extended to a dual-frequency scheme. Rather than generating a single fundamental frequency and cancelling n harmonics, the DFSHE approach regulates the amplitude of the fundamental and a kth harmonic to controlled values, while cancelling all harmonics in between and, possibly, a number of harmonics above the kth.
Passive Component Design and Integration
Two band-pass filters (LC resonant tank) are first adopted in the prototype to separate the fundamental and the kth harmonic, while attenuating other frequency element out of their resonant frequencies. The load variation will influence the quality factor of such two-order filters, and therefore, higher order filters are studied and further simulated to compare with the performance of the two-order filters. On the other hand, parasitic capacitance and ac resistance of inductor windings will bring impacts on the tuning of the appropriate frequencies of individual filters. As a result, a compact planar magnetic design will be conducted to precisely model and control such parasitic effect. Also, such component integration will decrease overall volume of the system.

##### Students
• Chongwen Zhao
##### Faculty

• The goal of our research is to establish a method for optimizing low power boost converters for use in far-field energy harvesting systems. By using a database of manufacturer-provided device characteristics, we are able to construct Figures of Merit (FOMs) capable of predicting component power loss based on boost converter parameters. A loss model based on a resistor emulation approach shown in [6] is constructed. Using this loss model, we were able to predict device power losses and system efficiency over a wide range of operating points.

It has been well-established through research that GaN devices have significantly fewer parasitic charges than silicon devices [7,8]. Because switching losses are proportional to both parasitic gate charges and frequency, lower gate charges allow for potential higher frequency operation while maintaining low power loss. One benefit of higher frequency operation is the potential to reduce inductor size while maintaining a constant current ripple. By reducing inductor size, we can increase the power density of the energy harvesting system. The creation of the FOMs allow us to understand the trade-offs which come with higher switching frequency and higher power density.

In order to illustrate the use of this system in a real-world application, we are constructing a system which uses an energy transducer called a rectenna, which transforms RF energy to electrical energy, to charge a battery through an optimized converter. A microcontroller controls the converter operation while monitoring the voltage at the output of the rectenna and the battery voltage. A transceiver then transmits this information to a receiver which displays the information to a user.

##### Students
• Doug Bouler
• Jared Baxter

#### Power Supplies

• In this research, the dual-frequency selective harmonic elimination (DFSHE) modulation scheme, which can simultaneously generate two different ac frequencies while suppressing undesired harmonics in between, is employed on a GaN-based WPT inverter, and then is verified on a 5 W prototype. Considering the wide difference between the fundamental output and its 67th harmonic, initial guess for numeric iteration algorithm is very critical and thus some investigation and modification are conducted for DFSHE to accommodate its application for WPT. Then, the circuit model of dual-frequency WPT system is studied and assumptions are made to achieve desired performance. In such model, different frequency path should show high impedance other than its own resonant frequency to minimize circulation current. High-order harmonics that out of the control range may lead to voltage pulsation, and some techniques will be investigated to alleviate such issues. In addition, multi-load regulation and operation within the same standard will be accomplished using the proposed modulation scheme. By fully utilizing available frequency band in one standard, individual load could be well regulated and controlled on its own, while only one inverter is involved. The selection of certain frequencies, and resonant network design will be considered and discussed to achieve better regulation performance.

##### Students
• Chongwen Zhao
##### Faculty

• The overall goal of this project is to provide new magnetic design parameters for more power efficient inductive components. These design parameters will provide guidelines for the inductor and the corresponding electropermanent magnet. Design variables for creating an energy efficient inductor include core dimensions, number of coil turns, airgap length, operating frequency and saturation levels. Design variables for the electropermanent magnet include, operational characteristics of permanent magnetic materials and their dimensions as well as energy required to alter the state of the electropermanent magnet. The electropermanent magnet-inductor pair design variables include optimal airgap between components for maximal flux cancellation and minimizing electromagnetic interference.

The internal flux of the electropermanent magnet-inductor pair were modeled using magnetic circuits and Finite Element Method Magnetics software. The saturation levels of the inductor were then tested using a custom designed PCB that includes dynamic switching capabilities of the electropermanent magnet. Currently, work is being done to switch the electropermanent magnet dynamically with a 60Hz current sine wave through the inductor. As the sine wave approaches its peak values the electropermanent magnet will switch on to adjust the inductor current so that it remains within its saturation limit.

##### Students
• Maeve Lawniczak
##### Faculty

• A single-stage 6.78 MHz transmitter is proposed which directly converts a utility ac input to a regulated, high frequency (6.78 MHz) ac output for wireless power transmission. The topology integrates a totem-pole rectifier operating in discontinuous conduction mode (DCM), and an asymmetrical voltage cancellation (AVC) controlled full bridge inverter. Compared with the traditional cascaded multi-stage transmitters, this single-stage approach achieves high power efficiency over the full load range, utilizes fewer GaN FETs, and shrinks the size of the converter. The operation and theoretical analysis of the single-stage transmitter are verified using a 100 W, GaN-based prototype [3].

A simple auxiliary circuit is added in the single-stage transmitter to further improve the light load efficiency by at least 5%. When output power is high, heavy load operation mode (with totem-pole rectifier) provides high PF and low THF of the input current. When the output power decreases to a certain value, light load mode (with voltage doubler) replaces heavy load mode to obtain high efficiency. The smooth transition between the two operation modes is achieved via an auxiliary circuit [4].

Constant transmitter coil current enables fast response to a sudden load change, so it is preferred in the multiple receivers application where frequent load changes are occurring. With the implementation of AVC modulation and impedance matching network in the single-stage transmitter, constant transmitter coil current is achieved over wide load range. Experimental results verify that multiple consumer electronics loads are charged from a single transmitter [5].

• Ling Jiang
##### Faculty

• The goal of this research is to realize the feasibility of fabricating 3D printed inductors and optimize them for power electronic circuits mentioned in the application section. To first prove these components can be feasibly fabricated, air core inductor prototypes with a range of toroidal geometries are designed using 3D design software such as Autodesk Inventor. Once created, the models are printed using a 3D printer with SLA plastic material. These designs will be used to test possible fabrication methods.

The current fabrication method under examination utilizes the chemical process of electroplating. This process uses electrical current passing through an electrolytic solution (copper sulfate) to move dissolved copper ions from an anode of pure copper to a cathode, the 3D printed inductor, which will coat it with a layer copper. These plated copper layers have been experimentally observed to be on the order of 10-100 micrometers thick. To allow the cathode to conduct current, the 3D printed inductor must first be coated with conductive paint. Different types of paint have been tested in this research, but the current method that obtains the best results utilizes a pre-coating layer of Caswell Copper Conductive Paint and an outer painting layer of MG Chemicals Nickel Ink. Once the electroplating process deposits a thin layer of copper on the outer surface of the inductor, the inductor is analyzed to determine the success of the plating experiments. Once the process yields a result that is deemed sufficient, the inductor's electrical properties are further analyzed. The inductance and AC/DC resistance is observed across a broad range of frequencies, and these measurements are compared with various commercial products to better understand how the custom inductor performs and which applications it is best-suited. Further evaluation of these inductors are done through 3D simulators such as Maxwell ANSYS to observe the inductor's predicted characteristics. The goal is then to further optimize the size and shape of the inductor to achieve maximum operational efficiency for circuit applications.

##### Students
• Quillen Blalock
##### Faculty

• For this project there are three main subsections that work together to accomplish the end goal. The first is a device database that contains various properties of many of the devices available on the market. This database is what will allow engineers to effectively search through the available devices to find the best device for a given situation. Along with the database a selection algorithm will be employed to search through the available data and find devices that are appropriate for the desired converter. The database has already been partially implemented; however, the selection algorithm is still in the planning stages. The second part of this project is the Automated Double Pulse Test. While there is a large amount of data available through device datasheets, its ability to predict device performance under a wide range of operating conditions is somewhat limited. In order to determine the performance of a device in a variety of situations, the device must undergo physical testing, most importantly, the double pulse test. The double pulse test is a somewhat long procedure and requires a significant time commitment to complete, especially when a fine combination of operating voltages and currents is desired. The Automated Double Pulse Test allows this process to be completely automated, with all desired measurements and calculations preformed automatically. In the future it will also allow for the data to automatically be added to the database. The final part of this project is a generalized test board that ties in closely with the Automated Double Pulse Test. This generalized test board will allow many devices to be tested with only minor changes to the test board and produce comparable results.

##### Students
• Kyle Goodrick
• Wen Zhang
• Edward Jones
##### Faculty

• The goal of this project is to create a design framework to assist researchers in finding the optimal topology, operation, and device selection for an arbitrary set of design objectives. An important aspect of the framework is a database of components, such as inductors and FETs. While tabular data is already available for commercial devices, the parameters given are typically high-level and do not represent the losses or requirements to completely analyze a high frequency, power-dense circuit. An indexed standardized database containing curves and experimental data integrated into a modeling framework will allow broad analysis and comparisons of devices to occur rapidly.
Discrete time state-space modeling provides a generalized method to rapidly find the steady-state of switched circuits [1-3]. If a converter can be approximated as a linear equivalent circuit within each switching interval, it can be modeled using state-space equations. Iterating through the linear equivalent models captures the switching behavior of the converter. By solving the state-space equation over the set of linear equivalent circuits for a converter, the periodic steady-state solution is
$$mathbf{x_{ss}}[n] = left(mathbf{I}-prod_{i=1}^ne^{mathbf{A}_it_i} ight)^{-1}left(sum_{i=1}^nleft(prod_{k=i+1}^ne^{mathbf{A}_kt_k} ight){mathbf{A}_i}^{-1}left(e^{mathbf{A}_it_i}-mathbf{I} ight)mathbf{B}_imathbf{u} ight) ~.$$
To solve for the steady-state of a circuit, each linear equivalent model and the transition time between linear equivalent models must be known. For active transitions caused by gate-controlled FETs, the timing can be easily determined. However, state dependent transitions such as diode conduction are unknown prior to solving the converter. This research has shown if states surrounding a diode conduction transition have nearly constant slopes, then the correct transitions can be derived by utilizing partial differential equations [3]. Current research hopes to better discern state dependent transitions without resorting to time-stepping simulation in any circuit. Future work will combine the standardized database with the discrete time state-space modeling method via an optimization process to create a design framework.

##### Students
• Jared Baxter
##### Faculty

• A rectifier is used to transform the AC signal of the WPT receiver coil into a DC signal in the device under charge. Essentially, the rectification stage enables the magnetic field (supplied by the transmitter) to be used to charge a battery in a mobile device. In this research, a synchronous rectifier is chosen and designed to use gallium nitride (GaN) switches and an inductor and capacitor (resonant tank), each in parallel with the rectifier's input. The resonant tank enables zero voltage switching (ZVS) in order to lower the power loss and raise power transfer efficiency.

For 6.78 MHz WPT systems, electromagnetic radiation is a potential problem. Generally, a multistage filter is used to remove harmonic distortion within the circuit waveforms. However, a better technique is to avoid creating harmonic distortion in the first place, and the solution presented in this research utilizes the resonant tank to elongate the ZVS transitions, thereby reducing the harmonic distortion generated by the circuit. Because the rectifier is actively switching, it is also possible to control the equivalent input phase of the rectifier. This is very useful in WPT charging (especially for multi-load WPT) because it allows the receiver to customize its load for optimizing the overall system efficiency. Overall, the rectifier researched here is a comprehensive solution that addresses many challenges for 6.78 MHz WPT systems, and eventually, makes WPT a little more intuitive for the end user.

##### Students
• Spencer Cochran
##### Faculty

• The 7-level switched capacitor rectifier (MSC) is a step forward for wireless power systems. The benefits of such a system include: combination of conversion stages, elimination of bulky inductances, reduction of WPT coil currents, and additional real-time tuning capabilities to compensate for misalignments. However, these benefits come with challenges. Any active rectifier must be able to synchronize its frequency with the carrier frequency of the WPT system. In addition, the proposed circuit aims to regulate the output load via its control actions. Each of these issues is a control problem. Solving this simultaneous dual-loop control problem is the current focus of the MSC research. State space descriptions and a sampled time steady state are derived for any operating point. Discrete time small signal models are then built by leveraging the steady state solutions. These discrete time models are used to characterize the plant for either control loop. With the plant characterized, the output regulation and frequency synchronization feedback circuits can be individually designed and analyzed. The current state of the research involves verifying the design process of the individual control loops and analyzing the interactions of the loops when the two are run simultaneously. Final design for simultaneous dual-loop control is upcoming and will propel the research forward immensely. This will be a large step toward enabling advanced synchronous rectification to be deployed into market-ready consumer devices.

##### Students
• Chongwen Zhao
• Spencer Cochran
##### Faculty

• The project aims to develop a next generation of rectifier power supply with 98% peak efficiency and high density based on new wide band gap devices. To achieve this, approaches in several aspects are conducted:

1. System architecture: Single-stage architecture consisting of 277 Vac â€“ 480 Vdc totem-pole power factor correction (PFC) converter, and 480 Vdc â€“ 48 Vdc isolated LLC DC-DC converter is designed and implemented.
2. Power semiconductor devices: to enhance the switching frequency and reduce the power loss, gallium-nitride (GaN) devices are implemented with high-voltage (HV) GaN FETs on the primary side, and low-voltage (LV) GaN FETs on the secondary side. Further, advanced packaging and layout techniques are conducted to improve parasitics and associated switching losses.
3. Control Strategies: for the PFC stage, full-line-cycle zero-voltage-switching (ZVS) is achieved with critical conduction mode operation and variable on-time control. For the isolated DC-DC stage, LLC converter is designed at resonant point to achieve theoretically highest efficiency with ZVS in all primary devices and zero-current switching (ZCS) in all secondary devices.
4. Passive components: Innovative magnetic devices are designed to fully utilize the superior switching performance of WBG devices. Also, the achieved higher switching frequency enables smaller magnetics. Modern magnetic materials such as nanocrystalline and powder cores are used to minimize passive losses and size
5. Power quality and EMI filter design: circuit noise sources are analyzed and input filter is designed to meet the conducted EMI, THD and power quality requirements. Also, the filter loss and thermal performance will be measured and optimized.

##### Students
• Jingjing Sun
• Xingxuan Huang
• Nathan Strain
##### Faculty

• The research is divided into 2 parts: power stage design and synchronization control design. For the power stage, the modified full-bridge rectifier circuit with a resonant tank at the input is used to achieve full ZVS, which is a key feature to reduce the switching loss at 6.78 MHz. The power loss, including transistor conduction loss, inductor conduction loss, and core loss, is modeled. The rectifier steady-state operating point is computed using the discrete-time state-space modeling techniques. An optimization process is proposed to find the optimal operating point and facilitate the power component selection.
For the synchronization control design, the phase-locked-loop based synchronization control is implemented using commercial components, including a low-cost microcontroller. A local sinusoidal signal depending on the magnetic field is sensed as a reference signal for the synchronization control. However, there is inherent feedback from the rectifier dynamics to the sensed signal complicating the control design. The discrete-time small-signal model with the incorporated deadtime is employed to analyze synchronization control input behaviors under the effect of the power stage. Finally, an analog compensator is designed to stabilize the control loop.

##### Students
• Peter Pham
• Spencer Cochran
##### Faculty

• The project aims to develop a converter-based emulator for data center power distribution system. To achieve this, approaches in several aspects are conducted:

1. Data center survey: commonly applied AC power distribution data centers are surveyed comprehensively to characterize the system architecture, operational principle, power electronics topologies, and protection schemes.
2. System simulation: simulation model of the data center power distribution system is built on MATLAB Simulink, mainly including the electrical system and the cooling system. The electrical system is composed of a centralized uninterrupted power supply (UPS), power distribution unit (PDU), rack-level power supply unit (PSU), server motherboard, and IT loads [2]. And the cooling system consists of cooling tower, chiller, cooling water pumps, computer room air handler (CRAH), server fans [3]. Power converters and the associated controls are used in the model.
3. Adaptive linearized average model: average model of each component is derived and linearized by discrete-time equations with 10 kHz sample frequency. Also, an adaptive model is derived to predict dynamic performances in different conditions.
4. Implementation on HTB: The linearized model of the data center is implemented in one of the voltage source inverters (VSI) in the HTB, which is a multi-converter based hardware testbed platform developed to perform real power testing and emulate the transmission-level power grid [4]. By programming the VSI, data center is emulated as one of the loads within the power system, to predict the dynamic performance of the grid network.
5. Emulation of transient conditions: dynamic transitions of the data center load mainly happens during the voltage sags when UPS switches the operation mode, backup energy switch online/offline, motor dynamic response, etc. Also, the data center backup energy can be used to provide some grid ancillary services like voltage support and frequency regulation, which induces more interactions between power grid and data centers.

##### Students
• Jingjing Sun