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Fred Wang

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Personal Photograph
Office: Min Kao 519
E-mail:
ude.ktu@gnaw.derf
Phone: 865-974-2146
Fax: 865-974-5483
Address: Min H. Kao Building, Suite 519
1520 Middle Drive
Knoxville, TN 37996-2250


Biography

Dr. Wang holds the Condra Chair of Excellence in Power Electronics and is a Professor in Electrical Engineering at The University of Tennessee, Knoxville. He also has a joint appointment with Oak Ridge National Lab. He is a founding member and the Technical Director of the NSF-DOE Engineering Research Center CURENT.  He is conducting research on: design, modeling, control, and integration of advanced power electronics converters; motor drives; wide bandgap device characterization, modeling, packaging, control, and application; power electronics application to transportation, renewable energy and utility power systems. Dr. Wang has authored and coauthored over 500 refereed publications, one book, and five book chapters. He has 20 awarded and pending US/international patents. He is a Fellow of IEEE and a Fellow of National Academy of Inventors.


At UTK, he has led or participated in more than 45 projects, totaling more than $65M, with personal share more than $18M. He has advised 13 Ph.D. and 8 M.S. students to completion. Has also supervised more than a dozen research faculty and post-doc researchers, and hosted more than 35 visiting students and faculty.\r\n\r\nDr. Wang received his B.S.E.E. from Xi''an Jiaotong University, Xi''an, China in 1982. In 1985 and 1990, he received his M.S. and Ph.D. degrees, respectively, in Electrical Engineering from University of Southern California (USC), Los Angeles, California. He worked as a research scientist at USC''s electric power lab from 1990 to 1992. His study and research at USC included power system transients and insulation coordination, power equipment diagnosis, and electromagnetic field effects and shielding.\r\n\r\nDr. Wang joined GE Power Systems Engineering in Schenectady, New York as an Application Engineer in 1992. From 1992-1994, he was involved in numerous projects including TCSC and other FACTS applications, SMES, HVDC, railway electrification, steel mill VAR and harmonic compensation. After a short stint as a marketing engineer in China for GE Power Systems, Dr. Wang became a senior development engineer at GE Drive Systems, Salem, VA in 1994. From 1994-2000, he participated and made key contributions in the development of GE''s cycloconverter main drive, and Innovation Series medium voltage drives - the world''s first three-level NPC mega-watt medium voltage PWM drives based on HVIGBT and IGCT. He was a main developer of the synchronous machine drive control algorithm. He developed the grid-interface control, robust modulation and neutral-point control, motor shaft voltage and bearing current mitigation, and converter protection schemes for the three-level PWM drives. In 2000, he joined GE Corporate R&D, Schenectady, New York as a program manager, responsible for establishing the Electrical Systems Technology Program in Shanghai, China.


Dr. Wang worked at the Center for Power Electronics Systems (CPES), Virginia Tech from 2001 to 2009, first as a research associate professor and became an associate professor in 2004. From  2003 to 2009, he also served as the CPES Technical Director. At CPES, Dr. Wang''s research focused on high power electronic converters and systems for industrial motor drives, more electric airplanes, all electric ships, oil and gas, and renewable and distributed energy systems. He led or participated in more than 30 projects totaling $11M, with personal share more than $5M. He advised and co-advised 10 Ph.D. and 8 MS students to completion and hosted 6 visiting faculty and students.


Dr. Wang actively participates in IEEE activities and is a member of Power Electronics, Power and Energy, Industry Applications and Industrial Electronics Societies. He is an associate editor of IEEE Transactions on Power Electronics. He participated and led in developing three IEEE Standards on power electronics systems. He has received eight prize paper awards from IEEE IAS. He was the recipient of the 2018 IEEE IAS Gerald Kliman Innovator Award. He also received Dushman award in 1998, the highest award for best team technical work in GE.  He is a three-time recipient of TCE Faculty Research Achievement Awards. He was the recipient of the 2019 EECS Gonzales Family Research Award.

Publications

Last updated May 19, 2020.

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Journal Papers
Title
Year
  • Handong Gui; Ruirui Chen; Zheyu Zhang; Jiahao Niu; Ren Ren; Bo Liu; Leon M. Tolbert; Fei Fred Wang; Daniel Costinett; Benjamin J. Blalock; Benjamin B. Choi
    IEEE Transactions on Power Electronics
    2020

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    This article establishes an analytical model for the device drain-source overvoltage related to the two loops in three-level active neutral point clamped (3L-ANPC) converters. Taking into account the nonlinear device output capacitance, two common modulation methods are investigated in detail. The results show that the line switching frequency device usually has higher overvoltage, and the switching speed of the high switching frequency device is not strongly influenced by the multiple loops. By keeping the nonactive clamping switch off, the effect of the nonlinear device output capacitance can be significantly mitigated, which helps reduce the overvoltage. Moreover, the loop inductance can be reduced with vertical loop layout and magnetic cancellation in the printed circuit board and busbar design. A 500-kVA 3L-ANPC converter using silicon carbide mosfets was built and tested. The experimental results validate the overvoltage model of the two modulation methods as well as the busbar design. With the nonactive clamping switch off, the overvoltage of both the high and line switching frequency devices is significantly reduced, which helps achieve higher switching speed.

  • Ren Ren; Handong Gui; Zheyu Zhang; Ruirui Chen; Jiahao Niu; Fei Wang; Leon M. Tolbert; Daniel Costinett; Benjamin J. Blalock; Benjamin B. Choi
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2020

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    In order to evaluate the feasibility of newly developed gallium nitride (GaN) devices in a cryogenically cooled converter, this article characterizes a 650-V enhancement-mode GaN high-electron mobility transistor (GaN HEMT) at cryogenic temperatures. The characterization includes both static and dynamic behaviors. The results show that this GaN HEMT is an excellent device candidate to be applied in cryogenic-cooled applications. For example, transconductance at cryogenic temperature (93 K) is 2.5 times higher than one at room temperature (298 K), and accordingly, peak di/dt during turn-on transients at cryogenic temperature is around 2 times of that at room temperature. Moreover, the ON-resistance of the channel at the cryogenic temperature is only one-fifth of that at room temperature. The corresponding explanations of performance trends at cryogenic temperatures are also given from the view of semiconductor physics. In addition, several device failures were observed during the dynamic characterization of GaN HEMTs at cryogenic temperatures. The ultrafast switching speed-induced high di/dt and dv/dt at cryogenic temperatures amplify the negative effects of parasitics inside the switching loop. Based on failure waveforms, two failure modes were classified, and detailed failure mechanisms caused by ultrafast switching speed are given in this article.

  • Handong Gui; Zheyu Zhang; Ruirui Chen; Ren Ren; Jiahao Niu; Haiguo Li; Zhou Dong; Craig Timms; Fei Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel Costinett; Benjamin B. Choi
    IEEE Transactions on Power Electronics
    2020

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    To better support the superconducting propulsion system in the future aircraft applications, the technologies of high-power high switching frequency power electronics systems at cryogenic temperatures should be investigated. This article presents the development of a 40-kW cryogenically cooled three-level active neutral point clamped inverter with 3 kHz output line frequency and 140 kHz switching frequency. Si mosfets are characterized at cryogenic temperatures, and the results show that they have promising performance such as lower on-resistance and switching loss. The design of the inverter is presented in detail with the special consideration of the cryogenic temperature operation. Moreover, a packaging and integration architecture is designed and fabricated to demonstrate the feasibility and performance of the inverter in the lab. It is able to achieve no leakage with good thermal and air insulation. With the inverter and packaging, the experimental results show that the inverter operates properly at cryogenic temperatures. The loss is measured at different load conditions, and the loss analysis is given, which shows that the cryogenically cooled inverter has 30% less loss than operating at room temperature.

  • Ruirui Chen; Jiahao Niu; Handong Gui; Zheyu Zhang; Fei Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin J. Blalock; Benjamin B. Choi
    IEEE Transactions on Power Electronics
    2020

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    Paralleling three phase three-level inverters is gaining popularity in industrial applications. However, analytical models for the harmonics calculation of a three-level neutral point clamped (NPC) inverter with popular space vector modulation (SVM) are not found in the literature. Moreover, how interleaving angle impacts the dc- and ac-side harmonics and electromagnetic interference (EMI) harmonics in parallel interleaved three-level inverters and how to optimize interleaving angle to reduce these harmonics have not been discussed in the literature. Furthering previous study, this article presents the modeling, analysis, and reduction of harmonics in paralleled and interleaved three-level NPC inverters with SVM. Analytical models for harmonic calculation are developed, and the dc-side harmonics characteristics of an NPC inverter are identified. The impact of interleaving angle on the ac-side voltage and dc-link current harmonics of parallel interleaved three-level NPC inverters is comprehensively studied. The impact of switching frequency and interleaving angle on EMI harmonics is also illustrated. Optimal interleaving angle ranges to reduce these harmonics are derived analytically. The developed models and harmonic reduction analysis are verified experimentally with two paralleled and interleaved three-level NPC inverters.

  • Bo Liu; Ren Ren; Fei Fred Wang; Daniel Costinett; Zheyu Zhang
    IEEE Transactions on Power Electronics
    2020

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    The attenuation performance of an electromagnetic interference filter can be significantly degraded by coupling, parasitics, and frequency-dependent nonlinearity, especially in high frequency (HF) range. This article reveals and investigates a mutual capacitive coupling effect in the popular filter structures with T-shaped joint. The mechanism is explained and the impact on filter attenuation is analyzed, which show this coupling is the dominant cause of performance degradation of T-shaped filters and a major cause for other T-shape-related filters. The effect patterns for both common-mode (CM) and differential-mode (DM) filters are analytically derived and further examined in multistage filter structures. Mitigation solutions using PCB slits and grounded shielding are proposed to improve filter transfer gain up to 30 dB in the HF range. A topological strategy is also presented, further enhancing filter attenuation. In addition, the impact of relative positions of the inductors on the coupling capacitance is discussed, and five positions are experimentally studied and compared. Experimental results obtained from three-phase LCL and LCLC filters verify the significance of this coupling and the effectiveness of the mitigation methods.

  • Handong Gui; Ruirui Chen; Jiahao Niu; Zheyu Zhang; Leon M. Tolbert; Fei Fred Wang; Benjamin J. Blalock; Daniel Costinett; Benjamin B. Choi
    IEEE Transactions on Power Electronics
    2020

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    In order to apply power electronics systems to applications such as superconducting systems under cryogenic temperatures, it is necessary to investigate the characteristics of different parts in the power electronics system. This article reviews the influence of cryogenic temperature on power semiconductor devices including Si and wide bandgap switches, integrated circuits, passive components, interconnection and dielectric materials, and some typical cryogenic converter systems. Also, the basic theories and principles are given to explain the trends for different aspects of cryogenically cooled converters. Based on the review, Si active power devices, bulk Complementary metal-oxide-semiconductor (CMOS) based integrated circuits, nanocrystalline and amorphous magnetic cores, NP0 ceramic and film capacitors, thin/metal film and wirewound resistors are the components suitable for cryogenic operation. Pb-rich PbSn solder or In solder, classic printed circuit boards material, most insulation papers and epoxy encapsulant are good interconnection and dielectric parts for cryogenic temperatures.

  • Bo Liu; Ren Ren; Fei Wang; Daniel Costinett; Zheyu Zhang
    IEEE Transactions on Industrial Electronics
    2020

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    This paper studies how an outer fractional winding can impact the equivalent parallel capacitance (EPC) of a differential-mode inductor, which is a critical passive component in a power electronic converter to combat with electromagnetic noises, and proposes a winding scheme that can reduce EPC and increase inductance, achieving both high-frequency filtering performance and high density. To perform these studies, a comprehensive layer capacitance model based on energy equivalence principle is established, which decouples EPC contribution among three elements, i.e., outer fraction layer, layer-to-layer, and layer-to-core, thus enabling the impact evaluation of different winding elements and schemes. Experimental comparison results have validated the accuracy of this EPC model and excellent performance of the proposed winding scheme with EPC reduction by 4×. It reveals that contrary to previous understanding, the inverse winding, in fact, is more effective for EPC reduction than the direct winding in most of the partial layer scenarios, and that by using this scheme with the outer fraction layer, 45% higher inductance and slightly less EPC can be achieved, compared to the single-layer winding design.

  • Handong Gui; Ruirui Chen; Zheyu Zhang; Jiahao Niu; Leon M. Tolbert; Fei Wang; Daniel Costinett; Benjamin J. Blalock; Benjamin B. Choi
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2020

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    Three-level converters are more susceptible to parasitics compared with two-level converters because of their complicated structure with multiple switching loops. This paper presents the methodology of busbar layout design for three-level converters based on magnetic cancellation effect. The methodology can fit for 3L converters with symmetric and asymmetric configurations. A detailed design example is provided for a high power three-level active neutral point clamped (ANPC) converter, which includes the module selection, busbar layout, and DC-link capacitor placement. The loop inductance of the busbar is verified with simulation, impedance measurements, and converter experiments. The results match with each other, and the inductances of short and long loops are 6.5 nH and 17.5 nH respectively, which are significantly lower than the busbars of NPC type converters in other references.

  • Wenchao Cao; Yiwei Ma; Fei Wang; Leon M. Tolbert; Yaosuo Xue
    IEEE Transactions on Smart Grid
    2020

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    For system planning of three-phase inverter-based islanded ac microgrids, the low frequency instability issue caused by interactions of inverter droop controllers is a major concern. When internal control information of procured commercial inverters is unknown, impedance-based small-signal stability criteria facilitate prediction of resonances in medium and high frequency ranges, but they usually assume the grid fundamental frequency as constant and thus they are incapable of analyzing the low-frequency oscillation of the fundamental frequency in islanded microgrids. Aiming at solving this issue, this paper proposes two stability analysis methods based on terminal characteristics of inverters and passive connection network including the dynamics of the fundamental frequency for analysis of low-frequency stability in islanded multiple-bus microgrids. Based on the Component Connection Method (CCM) to systematically separate inverters from the passive connection network, a general approach is developed to model the microgrid as a multiple-input-multiple-output (MIMO) negative feedback system in the common system d-q reference frame. By applying the generalized Nyquist stability criterion (GNC) to the return-ratio and return-difference matrices of the MIMO system model, the low-frequency stability related to the fundamental frequency can be analyzed using the measured terminal characteristics of inverters. Analysis and simulation of a 37-bus microgrid verify the effectiveness of the proposed stability analysis methods.

  • Shiqi Ji; Li Zhang; Xingxuan Huang; James Palmer; Fred Wang; Leon M. Tolbert
    IEEE Transactions on Power Electronics
    2020

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    Using high voltage (HV) Silicon Carbide (SiC) power semiconductors in the modular multilevel converter (MMC) is promising because of a fewer submodules and lower switching loss compared to conventional Si based solutions. The nearest level pulse width modulation (NL-PWM) is commonly used in the MMC for medium voltage applications. However, with the NL-PWM and existing voltage balancing control, there are many submodules that switch their modes in a control cycle, resulting in a high dv/dt during the deadtime of the power semiconductor, which could be multiple times of the dv/dt of single device. This poses great challenges on the noise immunity and insulation design in the MMC using HV SiC devices, which have very fast switching speed. A novel voltage balancing control, which ensures only two submodules switch their modes in a control cycle, is proposed in this paper, limiting the maximum dv/dt to the dv/dt of single power semiconductor and meanwhile maintaining the voltage balance performance. The proposed voltage balancing control is experimentally validated in a 10 kV SiC MOSFET based MMC with four submodules per arm.

  • Li Zhang; Shiqi Ji; Shida Gu; Xingxuan Huang; James Everette Palmer; William Giewont; Fred Wang; Leon M. Tolbert
    IEEE Transactions on Industrial Electronics
    2020

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    High performance gate drive power supply (GDPS) plays a crucial role in ensuring the reliability and safety of the gate driver for power semiconductor devices. This paper focuses on the design of a high-voltage- insulated GDPS for the 10-kV SiC MOSFET in medium-voltage (MV) application. Design considerations, including insulation scheme, high-voltage-insulated transformer design, and load voltage regulation scheme, are proposed. In addition, the performance of the secondary-side-regulated (SSR) GDPS and that of the primary-side-regulated (PSR) GDPS are compared for several aspects, including inter-winding capacitance, load-voltage-regulation-rate, conversion efficiency, and hardware complexity. Finally, an SSR GDPS and a PSR GDPS, with an insulation voltage of 20 kV, are built in the lab. The test results demonstrate that the PSR GDPS is more preferable because of lower interwinding capacitance, lower load-voltage-regulation-rate, higher conversion efficiency, and simpler control circuit.

  • Jie Chen; Yuting Shen; Jiawei Chen; Han Bai; Chunying Gong; Fred Wang
    IEEE Transactions on Transportation Electrification
    2020

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    Multi-pulse AC/DC Rectifiers (MPRs) are widely used in aviation application due to their rugged structure, cost effective, and high reliability features. In this paper, an overview of the recent advances and trends on the MPR technology, mainly the auto-configured transformer based MPRs, and its application in more electric aircrafts are performed. The work covers system topologies, transformer configurations, passive and active harmonic reduction schemes, case study, practical selection and design guideline, and applications. To fairly evaluate the performances of MPRs with different pulse number, necessary simulation studies are carried out under comparable conditions, including power rating, input and output specifications, and transformer configuration etc. Then, an 18-pulse asymmetric DP configured prototype is established based on the simulation evaluation and experimental verification is performed. It is expected that the paper can provide a broad perspective on MPR technology, and, in particular, highlight the latest emerged technology that significantly promotes the performances of MPRs. More importantly, it is desired that the results obtained in this paper can provide an effective selection guideline and design suggestion for researchers and engineers engaged in designing MPRs, especially for aviation application.

  • Fei Yang; Zhiqiang Wang; Zheyu Zhang; Steven L Campbell; Fei Wang
    IEEE Transactions on Power Electronics
    2019

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    Middle-point inductance Lmiddle can be introduced in multiple-chip power module package designs. In this paper, the effect of middle-point inductance on switching transients is analyzed first using a frequency-domain analysis. Then a dedicated multiple-chip power module is fabricated with the capability of varying Lmiddle, and extensive switching tests are conducted to evaluate the middle-point inductance's impact. Experiment result shows that the active MOSFET's turn-on loss decreases at higher values of Lmiddle, while its turn-off loss increases. Detailed analysis of this loss variation is presented. In addition to the switching loss variation, it is also observed that different peak voltage stresses are imposed on the active switch and antiparallel diode during the switching transients. Specifically, in the case of lower MOSFET's turn-off, the maximum voltage of the lower MOSFET increases as Lmiddle goes up; however, the peak voltage of the antiparallel diode decreases significantly. The induced voltage spikes during upper MOSFET turn-on process is also evaluated, and an opposite trend is observed experimentally. Analysis of the voltage overshoot variation is discussed. Based on the experimental evaluation and analysis, a multiple-chip power module package design guideline is summarized considering the middle-point inductance's effect.

  • Zheyu Zhang; Ben Guo; Fei Wang
    IEEE Transactions on Power Electronics
    2019

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    Parasitic ringing is commonly observed during the high-speed switching of wide band-gap (WBG) devices. Additional loss contributed by parasitic ringing becomes a concern especially for high switching frequency applications. This paper investigates the effects of parasitic ringing on the switching loss of WBG devices in a phase-leg configuration. An analytical switching loss model considering parasitics in power devices and application circuit is derived. Two switching commutation modes, gate drive dominated mode and power loop dominated mode, are investigated, respectively, and the switching loss induced by damping ringing is identified. It is found that this portion of the loss is at most the energy stored in parasitics, which always exists regardless of the switching speed and parasitic ringing. Therefore, with the given WBG device in the specific application circuit, damping more severe parasitic ringing during faster switching transient would not introduce higher switching loss. Additionally, the extra switching loss induced by resonance among parasitics and crosstalk is investigated. It is observed that severe resonance and its resultant over-voltage during the turn-on transient worsen the crosstalk, causing large shoot-through current and excessive switching loss. The theoretical analysis has been verified by the double pulse test with a 1200-V/50-A SiC-based phase-leg power module.

  • Handong Gui; Zheyu Zhang; Ruirui Chen; Jiahao Niu; Leon M. Tolbert; Fei Fred Wang; Daniel Costinett; Benjamin J. Blalock; Benjamin B. Choi
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2019

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    To understand the limitation of maximizing the switching speed of SiC low current discrete devices and high current power modules in hard switching applications, double pulse tests are conducted and the testing results are analyzed. For power modules, the switching speed is generally limited by the parasitics rather than the gate drive capability. For discrete SiC devices, the conventional voltage source gate drive (VSG) is not sufficient to maximize the switching speed even if the external gate resistance is minimized. The limitation of existing current source gate drives (CSG) are analyzed, and a CSG dedicated for SiC discrete devices is proposed, which can provide constant current during the switching transient regardless of the high Miller voltage and large internal gate resistance. Compared with the conventional VSG, the proposed CSG achieves 67% faster turnon time and 50% turn-off time, and 68% reduction in switching loss at full load condition.

  • Bo Liu; Ren Ren; Edward A. Jones; Handong Gui; Zheyu Zhang; Ruirui Chen; Fei Wang; Daniel Costinett
    IEEE Transactions on Power Electronics
    2019

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    This paper identifies extra junction capacitances and switching commutation loops introduced by line-frequency devices (i.e., non-active every other half line cycle) in three-level ac/dc converters and investigates the corresponding effects. Junction capacitances and power loops are well known as the key factors that impact converter switching loss and device stress, thus influence device selection, power stage layout, and thermal design. By examining switching transients of the commonly used T-shaped and I-shaped three-level converters, the cause and mechanism of the extra junction capacitances and power loops are presented. The impacts on switching loss, device voltage stress, and ac-side voltage/current distortion are respectively reported and analyzed. A loss calculation scheme for the three-level converter to include that extra loss is proposed. A power layout scheme to mitigate the device voltage stress is provided. Compensation and modeling of the voltage and current distortion are also proposed. Experimental results conducted on several types of three-level converter prototypes including a gallium nitride based 115 Vac/650 Vdc/1.5-kW/450-kHz Vienna-type rectifier and a SiC MOSFET based 1-kV/10-kW/ 280-kHz three-level active neutral-point-clamped inverter confirm the presented effects and verify the associated analysis and solutions.

  • Zheyu Zhang; Jacob Dyer; Xuanlyu Wu; Fei Wang; Daniel Costinett; Leon M. Tolbert; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2019

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    Junction temperature is an important design/operation parameter, as well as, a significant indicator of device's health condition for power electronics converters. Compared to its silicon (Si) counterparts, it is more critical for silicon carbide (SiC) devices due to the reliability concern introduced by the immaturity of new material and packaging. This paper proposes a practical implementation using an intelligent gate drive for online junction temperature monitoring of SiC devices based on turn-off delay time as the thermo-sensitive electrical parameter. First, the sensitivity of turn-off delay time on the junction temperature for fast switching SiC devices is analyzed. A gate impedance regulation assist circuit is proposed to enhance the sensitivity by a factor of 60 and approach 736 ps/°C tested in the case study with little penalty on the power conversion performance. Next, an online monitoring unit based on gate assist circuits is developed to monitor the turn-off delay time in real time with the resolution less than 104 ps. As a result, the micro-controller is capable of “reading” junction temperature during the converter operation. Finally, a SiC-based half-bridge inverter is constructed with an intelligent gate drive consisting of the gate impedance regulation circuit and online turn-off delay time monitoring unit. Experimental results demonstrate the feasibility and accuracy of the proposed approach.

  • Zheyu Zhang; Leon M. Tolbert; Daniel Costinett; Fei Wang; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2019

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    As wide-bandgap (WBG) devices and applications move from niche to mainstream, a new generation of engineers trained in this area is critical to continue the development of the field. This paper introduces a new hands-on course in characterization of WBG devices, which is an emerging and fundamental topic in WBG-based techniques. First, the lecture-simulation-experiment format based course structure and design considerations, such as safety, are presented. Then, the necessary facilities to support this hands-on course are summarized, including classroom preparation, software tools, and laboratory equipment. Afterward, the detailed course implementation flow is presented to illustrate the approach of close interaction among lecture, simulation, and experiment to maximize students' learning outcomes. Finally, grading for students and course evaluation by students are discussed, highlighting the findings and potential improvements. Detailed course materials are provided via potenntial.eecs.utk.edu/WBGLab for educational use.

  • Xiaotong Hu; Tianqi Liu; Yiwei Ma; Yu Su; He Yin; Lin Zhu; Fei Wang; Leon M. Tolbert; Yilu Liu
    IET Generation, Transmission & Distribution
    2019

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    For some distribution networks equipped with smart switches such as Chattanooga Electric Power Board (EPB) system, they can island some areas of the network to mitigate the impact through defensive islanding. However, due to intermittency and uncertainty of renewable-based distributed energy resources (DERs), it is highly likely that the islanded areas would experience insufficient or surplus power. This problem can be relieved by changing the boundaries of islanded areas to incorporate neighbouring load sections (LSs) or disconnect some connected LSs. Considering penetration level and sharply changing rate of renewable energy, it is challenging to define suitable boundaries for islanded areas in real time. Therefore, a two-stage energy management system (EMS) is proposed in this study, which includes day-ahead scheduling stage as well as short-term and real-time control stages. In the first stage, the initial switch combinations of LSs and DERs’ scheduling are obtained through a mixed integer quadratic programming, whereas the second stage is based on rule-based power management algorithm. Finally, a model reduced from real EPB system is used for validating the proposed two-stage EMS. The results successfully verify the effectiveness and performance of the proposed EMS for addressing the energy management of islanded areas under defensive islanding.

  • Shiqi Ji; Marko Laitinen; Xingxuan Huang; Jingjing Sun; William Giewont; Fei Wang; Leon M. Tolbert
    IEEE Transactions on Power Electronics
    2019

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    This paper presents the characterization of the temperature-dependent short-circuit performance of a Gen3 10 kV/20 A silicon carbide (SiC) mosfet. The test platform consisting of a phase-leg configuration and a fast speed 10-kV solid state circuit breaker, with temperature control, is introduced in detail. A novel FPGA-based short-circuit protection circuit having a response time of 1.5 μs is proposed and integrated into the gate driver. The short-circuit protection is validated through the platform. The short-circuit characteristics for both the hard switching fault and fault under load (FUL) types at various dc-link voltages (from 500 V to 6 kV) are tested and discussed. The saturation current increases with dc-link voltage and achieves 360 A at 6 kV. Different from low voltage SiC devices, there is no current spike in FUL type of fault. The temperature-dependent short-circuit performance is also presented from 25 to 125 °C. The difference of short-circuit waveforms at various initial junction temperatures can be neglected. A thermal model of the 10-kV SiC mosfet is built for the junction temperature estimation during the short circuit and for analysis of the initial junction temperature impact on the short-circuit performance.

  • Jessica D. Boles; Yiwei Ma; Jingxin Wang; Denis Osipov; Leon M. Tolbert; Fred Wang
    IEEE Transactions on Industry Applications
    2019

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    Battery energy storage systems (BESSs) tend to be too costly, restrictive, and require high maintenance for experimental use, but power system tests often need their representation. As a solution, we propose an all-in-one, reconfigurable BESS emulation tool for grid applications that only requires one three-phase voltage-source converter. This emulator provides chemistry-specific battery behavior like previous work, but it also includes the BESS's power electronics interface and control as well as automatic frequency and voltage support functions for the attached power system. Thus, it allows simple, plug-and-play BESS emulation for grid applications. This paper details the construction, verification, and use of the BESS emulator in an existing grid testbed and concludes that it provides an inexpensive, easy-to-use alternative to using real BESSs in power system experiments.

  • He Yin; Yiwei Ma; Lin Zhu; Xiaotong Hu; Yu Su; Jim Glass; Fred Wang; Yilu Liu; Leon M. Tolbert
    IET Smart Grid
    2019

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    The design, implementation, and testing of a control system for a flexible microgrid (MG) is presented in this study. The MG controllers can be implemented in a real-world MG with multiple smart switches, photovoltaic panel system, and battery energy storage systems (BESSs). With the benefits from smart switches, the MG has unique characteristics such as dynamic boundary and flexible point of interconnection (POI) concepts. To control such a unique MG and realise the dynamic boundary, an MG central controller and two types of local controllers are implemented. Compared to the MG with fixed boundary, the MG with dynamic boundary can have smaller BESS capacity, better utilisation of renewable energy, and multiple POI options. Also, compared with IEEE Std 2030.7–2017, the topology identification and active and reactive power balance functions are newly designed to realise the dynamic boundary concept. The planned islanding and reconnection functions are modified to realise the flexible POI concept. These functions are introduced including the software architecture, cooperation, and interaction among them. Finally, a hardware-in-the-loop testing platform based on the Opal-RT real-time simulator is set up to verify the performance, realisation of the dynamic boundary, and flexible POI concepts with four comprehensive test scenarios.

  • Yu Ren; Xu Yang; Fan Zhang; Fred Wang; Leon M. Tolbert; Yunqing Pei
    IEEE Transactions on Power Electronics
    2019

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    Semiconductor devices based solid-state circuit breakers (SSCBs) are promising in the dc power distribution system as protective equipment for their ultrashort action time. This letter proposes a topology of SSCB using series connected silicon carbide (SiC) metal oxide semiconductor field effect transistors (mosfets), which only requires a single isolated gate driver. The SSCB has very low cost and high reliability because it only has 13 components including passive components and diodes apart from two SiC mosfets to achieve both balanced voltage distribution during short-circuit interruption duration and reliable positive gate voltage during on-state. The SSCB prototype is built and experimentally verified to interrupt 75 A short-circuit current under the dc-bus voltage of 1200 V within 1.5 μs.

  • Dong Jiang; Puqi Ning; Rixin Lai; Zhihao Fang; Fred Wang
    Chinese Journal of Electrical Engineering
    2018

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    This paper introduces the concept of modular design methodology for hardware design and development of motor drives. The modular design process is first introduced separating the hardware development into three parts: controller, mother board and phase-leg module. The control and circuit function can be decoupled from the phase-leg module development. The hardware update can be simplified with the phase-leg module development and verification. Two design examples are used to demonstrate this method: a DC-fed motor drive with Si IGBTs and an AC-fed motor drive with SiC devices. Design of DC-fed motor drive aims at developing the converter with customized IGBT package for high temperature. Experience with development of the converter with commercial IGBTs simplifies the process. As the AC-fed motor drive is a more complex topology using more advanced devices, the modular design method can simplify and improve the development especially for new packaged devices. Also, the modular design method can help to study the electromagnetic interference (EMI) issue for motor drives, which is presented with an extra design example.

  • Fei Fred Wang; Bo Liu
    CPSS Transactions on Power Electronics and Applications
    2018

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    The emergence of wide bandgap (WBG) semiconductor devices such as silicon carbide (SiC) and gallium nitride (GaN) devices promises to revolutionize next-generation power electronics converters. Featuring high breakdown electric field, low specific on-resistance, fast switching speed, and high junction temperature capability, these devices are beneficial for the efficiency, power density, reliability, and/or cost of power electronics converters. WBG devices have been employed in some commercial and industrial products with more applications expected in near future. However, extremely fast switching and other superior characteristics of WBG device, and high switching frequency/high voltage/high junction temperature operation, present new design challenges in gate drive and protection, packaging and layout, EMI suppression, and converter control, etc. Addressing these design and application issues is critical to the adoption, commercialization, and success of WBG based power electronics. This special issue intends to report the latest progress in these important areas.

  • Dong Jiang; Zewei Shen; Fei Wang
    IEEE Transactions on Power Electronics
    2018

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    This paper introduces series work of common-mode (CM) voltage reduction for the paralleled inverters. The paralleled inverters' phase-legs are connected through coupling inductors and the combined three-phase currents are provided to the load. Interleaving is an approach to reduce the CM voltage for the paralleled inverters but it cannot eliminate CM voltage. A novel pulse-width-modulation (PWM) method for paralleled inverters which can theoretically achieve zero CM voltage is developed. Considering the basic voltage vectors in each inverter, novel paralleled voltage vectors which have zero CM voltage are proposed to combine the reference voltage vector. The action time's distribution and voltage vectors' sending sequence for each inverter are also introduced. The proposed PWM method can make sure the voltage of the two inverters are balanced in each switching cycle and limits the circulating current through small coupling inductors. Similar to interleaving space vector PWM, the proposed zero CM PWM also has the ability to reduce the output current ripple and electromagnetic interference (EMI). Simulation and experimental results are provided to show the advantage of paralleled inverters in CM voltage reduction and validate the proposed method has good performance to reduce CM current and CM EMI noise.

  • Bo Liu; Ren Ren; Zheyu Zhang; Ben Guo; Fei Wang; Daniel Costinett
    CPSS Transactions on Power Electronics and Applications
    2018

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    A systematic study on a gallium nitride (GaN) high-electron-mobility transistor (HEMT) based battery charger, consisting of a Vienna-type rectifier plus a dc-dc converter, reveals a common phenomenon. That is, the high switching frequency, and high di/dt and dv/dt noise inside GaN converters may induce a dc drift or low frequency distortion on sensing signals. The distortion mechanisms for different types of sensing errors are identified and practical minimization techniques are developed. Experimental results on the charger system have validated these mechanisms and corresponding approaches, showing an overall reduction of input current total harmonic distortion (THD) by up to 5 percentage points and improved dc-dc output voltage regulation accuracy. The knowledge helps engineers tackle the troublesome issues related to noise.

  • Bo Liu; Ren Ren; Edward A. Jones; Fred Wang; Daniel Costinett; Zheyu Zhang
    IEEE Transactions on Power Electronics
    2018

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    Wide bandgap semiconductors are gradually being adopted in high power-density high efficiency applications, providing faster switching and lower loss, and at the same time imposing new challenges in control and hardware design. In this paper, a gallium nitride-based Vienna-type rectifier with SiC diodes is proposed to serve as the power factor correction stage in a high-density battery charger system targeting for aircraft applications with 800 Hz ac system and 600 V level dc link, where power quality is required according to DO160E standard. To meet the current harmonic requirement, PWM voltage distortion during the turn-off transient, is studied as the main harmonics contributor. The distortion mechanism caused by different junction capacitances of the switching devices is presented. A mitigation scheme considering the nonlinear voltage-dependent characteristics of these capacitances is proposed and then simplified from a pulse-based turn-off compensation method to a general modulation scheme. Simulation and experimental results with a 450 kHz Vienna-type rectifier demonstrate the performance of the proposed approach, showing a THD reduction from 10% to 3% with a relatively low-speed controller.

  • Yiwei Ma; Jingxin Wang; Fred Wang; Leon M. Tolbert
    Chinese Journal of Electrical Engineering
    2018

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    A Hardware Testbed(HTB) is developed for accurate and flexible emulation and testing of electrical power system and their control, measurement, and protection systems. In the HTB, modular and programmable power electronics converters are used to mimic the static and dynamic characteristics of electrical power components. This paper overviews the development, integration, and application of the HTB, covering emulation principle, hardware and software configuration, and example results of power system research using the HTB. The advantages of the HTB, compared with real-time digital simulation and downscaled hardware-based testing platform are discussed.

  • Shuoting Zhang; Bo Liu; Sheng Zheng; Yiwei Ma; Fei Wang; Leon M. Tolbert
    IEEE Transactions on Power Electronics
    2018

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    A transmission line emulator has been developed to flexibly represent interconnected ac lines under normal operating conditions in a voltage-source-converter-based power system emulation platform. As the most serious short-circuit fault condition, the three-phase short-circuit fault emulation is essential for power system studies. This paper proposes a model to realize a three-phase short-circuit fault emulation at different locations along a single transmission line or one of several parallel-connected transmission lines. At the same time, a combination method is proposed to eliminate the undesired transients caused by the current reference step changes while switching between the fault state and the normal state. Experiment results verify the developed transmission line three-phase short-circuit fault emulation capability.

  • Shiqi Ji; Fei Wang; Leon M. Tolbert; Ting Lu; Zhengming Zhao; Hualong Yu
    IEEE Transactions on Industry Applications
    2018

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    The series connection of insulated gate bipolar transistors (IGBTs) allows operation at voltage levels higher than the rated voltage of one IGBT and has less power semiconductor costs compared to multilevel topologies. However, voltage unbalance during the switching transient is a challenge for series-connected device application. This paper presents an field-programmable gate array (FPGA)-based voltage balancing strategy for multiseries-connected high-voltage (HV)-IGBTs including an FPGA-based active voltage balancing control (AVBC) circuit integrated into the gate driver and the control for multiseries-connected IGBTs. The effectiveness of the control has been experimentally validated in a prototype using four 4.5 kV HV-IGBTs in series connection.

  • Shiqi Ji; Sheng Zheng; Fei Wang; Leon M. Tolbert
    IEEE Transactions on Power Electronics
    2018

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    The temperature-dependent characteristics of the third-generation 10-kV/20-A SiC MOSFET including the static characteristics and switching performance are carried out in this paper. The steady-state characteristics, including saturation current, output characteristics, antiparallel diode, and parasitic capacitance, are tested. A double pulse test platform is constructed including a circuit breaker and gate drive with >10-kV insulation and also a hotplate under the device under test for temperature-dependent characterization during switching transients. The switching performance is tested under various load currents and gate resistances at a 7-kV dc-link voltage from 25 to 125 C and compared with previous 10-kV MOSFETs. A simple behavioral model with its parameter extraction method is proposed to predict the temperature-dependent characteristics of the 10-kV SiC MOSFET. The switching speed limitations, including the reverse recovery of SiC MOSFET's body diode, overvoltage caused by stray inductance, crosstalk, heat sink, and electromagnetic interference to the control are discussed based on simulations and experimental results.

  • Jiaojiao Dong; Lin Zhu; Yu Su; Yiwei Ma; Yilu Liu; Fred Wang; Leon M. Tolbert; Jim Glass; Lilian Bruce
    IET Generation, Transmission & Distribution
    2018

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    Owing to the recent power outages caused by extreme events, installing battery energy storage and backup generators is important to improve resiliency for a grid-tied microgrid. In the design stage, the event occurrence time and duration, which are highly uncertain and cannot be effectively predicted, may affect the needed battery and backup generator capacity but are usually assumed to be pre-determined in utility planning tools. This study investigates the optimal battery and backup generator sizing problem considering the stochastic event occurrence time and duration for the grid-tied microgrid under islanded operation. The reliability requirement is quantified by the mean value of the critical customer interruption time in each stochastic islanding time window (ITW), whose length is the duration and the centre is the occurrence time. The stochastic ITW constraint is then transformed to a probability-weighted expression to derive an equivalent Mixed Integer Linear Programming model. Numerical simulations on a realistic grid-tied PV-based microgrid demonstrate that the total cost is reduced by 11.5% considering the stochastic ITW, compared with the deterministic ITW under the same reliability requirement.

  • Weimin Zhang; Fred Wang; Daniel J. Costinett; Leon M. Tolbert; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2017

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    Newly emerged gallium nitride (GaN) devices feature ultrafast switching speed and low on-state resistance that potentially provide significant improvements for power converters. This paper investigates the benefits of GaN devices in an LLC resonant converter and quantitatively evaluates GaN devices' capabilities to improve converter efficiency. First, the relationship of device and converter design parameters to the device loss is established based on an analytical model of LLC resonant converter operating at the resonance. Due to the low effective output capacitance of GaN devices, the GaN-based design demonstrates about 50% device loss reduction compared with the Si-based design. Second, a new perspective on the extra transformer winding loss due to the asymmetrical primary-side and secondary-side current is proposed. The device and design parameters are tied to the winding loss based on the winding loss model in the finite element analysis (FEA) simulation. Compared with the Si-based design, the winding loss is reduced by 18% in the GaN-based design. Finally, in order to verify the GaN device benefits experimentally, 400- to 12-V, 300-W, 1-MHz GaN-based and Si-based LLC resonant converter prototypes are built and tested. One percent efficiency improvement, which is 24.8% loss reduction, is achieved in the GaN-based converter.

  • Zheyu Zhang; Jeffery Dix; Fei Fred Wang; Benjamin J. Blalock; Daniel Costinett; Leon M. Tolbert
    IEEE Transactions on Power Electronics
    2017

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    This paper presents an intelligent gate drive for silicon carbide (SiC) devices to fully utilize their potential of high switching-speed capability in a phase-leg configuration. Based on the SiC device's intrinsic properties, a gate assist circuit consisting of two auxiliary transistors with two diodes is introduced to actively control gate voltages and gate loop impedances of both devices in a phase-leg configuration during different switching transients. Compared to conventional gate drives, the proposed circuit has the capability of accelerating the switching speed of the phase-leg power devices and suppressing the crosstalk to below device limits. Based on Wolfspeed 1200-V SiC MOSFETs, the test results demonstrate the effectiveness of this intelligent gate drive under varying operating conditions. More importantly, the proposed intelligent gate assist circuitry is embedded into a gate drive integrated circuit, offering a simple, compact, and reliable solution for end-users to maximize benefits of SiC devices in actual power electronics applications.

  • Yutian Cui; Fei Yang; Leon M. Tolbert; Daniel J. Costinett; Fred Wang; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2017

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    With the increased cloud computing and digital information storage, the energy requirement of data centers keeps increasing. A high-voltage point of load (HV POL) with an input series output parallel structure is proposed to convert 400 to 1 VDC within a single stage to increase the power conversion efficiency. The symmetrical controlled half-bridge current doubler is selected as the converter topology in the HV POL. A load-dependent soft-switching method has been proposed with an auxiliary circuit that includes inductor, diode, and MOSFETs so that the hard-switching issue of typical symmetrical controlled half-bridge converters is resolved. The operation principles of the proposed soft-switching half-bridge current doubler have been analyzed in detail. Then, the necessity of adjusting the timing with the loading in the proposed method is analyzed based on losses, and a controller is designed to realize the load-dependent operation. A lossless RCD current sensing method is used to sense the output inductor current value in the proposed load-dependent operation. Experimental efficiency of a hardware prototype is provided to show that the proposed method can increase the converter's efficiency in both heavy- and light-load conditions.

  • Zheyu Zhang; Haifeng Lu; Daniel J. Costinett; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2017

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    Dead time significantly affects the reliability, power quality, and efficiency of voltage-source converters. For silicon carbide (SiC) devices, considering the high sensitivity of turn-off time to the operating conditions (> 5× difference between light load and full load) and characteristics of inductive loads (> 2× difference between motor load and inductor), as well as large additional energy loss induced by the freewheeling diode conduction during the superfluous dead time (~15% of the switching loss), then the traditional fixed dead time setting becomes inappropriate. This paper introduces an approach to adaptively regulate the dead time considering the current operating condition and load characteristics via synthesizing online monitored turn-off switching parameters in the microcontroller with an embedded preset optimization model. Based on a buck converter built with 1200-V SiC MOSFETs, the experimental results show that the proposed method is able to ensure reliability and reduce power loss by 12% at full load and 18.2% at light load (8% of the full load in this case study).

  • Liu Yang; Jing Wang; Yiwei Ma; Jingxin Wang; Xiaohu Zhang; Leon M. Tolbert; Fei Fred Wang; Kevin Tomsovic
    IEEE Transactions on Power Electronics
    2017

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    This paper develops a synchronous generator emulator by using a three-phase voltage source converter for transmission level power system testing. Different interface algorithms are compared, and the voltage type ideal transformer model is selected considering accuracy and stability. At the same time, closed-loop voltage control with current feed-forward is proposed to decrease the emulation error. The emulation is then verified through two different ways. First, the output waveforms of the emulator in experiments are compared with the simulation under the same condition. Second, a transfer function perturbation-based error model is obtained and redefined as the relative error for the amplitude and phase between the emulated and the target system over the frequency range of interest. The major cause of the error is investigated through a quantitative analysis of the error with varying parameters.

  • Xiaojie Shi; Zhiqiang Wang; Bo Liu; Yalong Li; Leon M. Tolbert; Fred Wang
    IEEE Transactions on Power Electronics
    2017

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    This paper presents a steady-state model of MMC for the second-order phase voltage ripple prediction under unbalanced conditions, taking the impact of negative-sequence current control into account. From the steady-state model, a circular relationship is found among current and voltage quantities, which can be used to evaluate the magnitudes and initial phase angles of different circulating current components. Moreover, in order to calculate the circulating current in a point-to-point MMC-based HVdc system under unbalanced grid conditions, the derivation of equivalent dc impedance of an MMC is discussed as well. According to the dc impedance model, an MMC inverter can be represented as a series connected R-L-C branch, with its equivalent resistance and capacitance directly related to the circulating current control parameters. Experimental results from a scaled-down three-phase MMC system under an emulated single-line-to-ground fault are provided to support the theoretical analysis and derived model. This new models provides an insight into the impact of different control schemes on the fault characteristics and improves the understanding of the operation of MMC under unbalanced conditions.

  • Zheyu Zhang; Ben Guo; Fei Fred Wang; Edward A. Jones; Leon M. Tolbert; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2017

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    The double pulse test (DPT) is a widely accepted method to evaluate the dynamic behavior of power devices. Considering the high switching-speed capability of wide band-gap devices, the test results are very sensitive to the alignment of voltage and current (V-I) measurements. Also, because of the shoot-through current induced by Cdv/dt (i.e., cross-talk), the switching losses of the nonoperating switch device in a phase-leg must be considered in addition to the operating device. This paper summarizes the key issues of the DPT, including components and layout design, measurement considerations, grounding effects, and data processing. Additionally, a practical method is proposed for phase-leg switching loss evaluation by calculating the difference between the input energy supplied by a dc capacitor and the output energy stored in a load inductor. Based on a phase-leg power module built with 1200-V/50-A SiC MOSFETs, the test results show that this method can accurately evaluate the switching loss of both the upper and lower switches by detecting only one switching current and voltage, and it is immune to V-I timing misalignment errors.

  • Wenchao Cao; Yiwei Ma; Liu Yang; Fei Wang; Leon M. Tolbert
    IEEE Transactions on Industrial Electronics
    2017

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    Small-signal stability is an important concern in three-phase inverter-based ac power systems. The impedance-based approach based on the generalized Nyquist stability criterion (GNC) can analyze the stability related with the medium and high-frequency modes of the systems. However,. the GNC involves the right-half-plane (RHP) pole calculation of return-ratio transfer function matrices, which cannot be avoided for stability analysis of complicated ac power systems. Therefore, it necessitates the detailed internal control information of the inverters, which is not normally available for commercial inverters. To address this issue, this paper introduces the component connection method (CCM) in the frequency domain for stability analysis in the synchronous d-q frame, by proposing a method of deriving the impedance matrix of the connection networks of inverter-based ac power systems. Demonstration on a two-area system and a microgrid shows that: The CCM-enabled approach can avoid the RHP pole calculation of return-ratio matrices and enables the stability analysis by using only the impedances of system components, which could be measured without the need for the internal information. A stability analysis method based on d-q impedances, the CCM, and the determinant-based GNC is also proposed to further simplify the analysis process. Inverter controller parameters can be designed as stability regions in parameter spaces, by repetitively applying the proposed stability analysis method. Simulation and experimental results verify the validity of the proposed stability analysis method and the parameter design approach.

  • Bo Liu; Xiaojie Shi; Yalong Li; Fei Fred Wang; Leon M. Tolbert
    IEEE Transactions on Power Electronics
    2017

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    Hybrid ac/dc transmission extends the power transfer capacity of existing long ac lines closer to their thermal limit, by superposing the dc current onto three-phase ac lines through a zigzag transformer. However, this transformer could suffer saturation under unbalanced line impedance conditions. This paper introduces the concept of hybrid line impedance conditioner (HLIC) as a cost-effective approach to compensate for the line unbalance and therefore avoid saturation. The topology and operation principle are presented. The two-level control strategy is described, which enables autonomous adaptive regulation without the need of system-level control. Design and implementation are also analyzed, including dc-link capacitance as one of the key line conditioner components, HLIC installation, and protection under fault conditions. The cost study on this HLIC-based hybrid system is also performed to reveal the benefits of the solution. Simulation results and experimental results based on a down-scaled prototype are provided to verify the feasibility of the proposed approach.

  • Yiwei Ma; Wenchao Cao; Liu Yang; Fei Wang; Leon M. Tolbert
    IEEE Transactions on Industrial Electronics
    2017

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    One way to incorporate the increasing amount of wind penetration is to control wind turbines to emulate the behavior of conventional synchronous generators. However, the energy balance is the main issue for the wind turbines to be truly dispatchable by the power system operator such as the generators. This paper presents a comprehensive virtual generator control method for the full converter wind turbine, with a minute-level energy storage in the dc link as the energy buffer. The voltage closed-loop virtual synchronous generator control of the wind turbine allows it to work under both grid-connected and stand-alone condition. Power balance of the wind turbine system is achieved by controlling the rotor speed of the turbine according to the loading condition. With the proposed control, the wind turbine system can enhance the dynamic response, and can be dispatched and regulated by the system operator. The sizing design of the short term energy storage is also discussed in this paper. Experimental results are presented to demonstrate the feasibility and effectiveness of the proposed control method.

  • Yalong Li; Xiaojie Shi; Bo Liu; Wanjun Lei; Fred Wang; Leon M. Tolbert
    IEEE Transactions on Power Electronics
    2017

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    This paper presents the development of a scaled four-terminal high-voltage direct current (HVDC) testbed, including hardware structure, communication architecture, and different control schemes. The developed testbed is capable of emulating typical operation scenarios including system start-up, power variation, line contingency, and converter station failure. Some unique scenarios are also developed and demonstrated, such as online control mode transition and station re-commission. In particular, a dc line current control is proposed, through the regulation of a converter station at one terminal. By controlling a dc line current to zero, the transmission line can be opened by using relatively low-cost HVDC disconnects with low current interrupting capability, instead of the more expensive dc circuit breaker. Utilizing the dc line current control, an automatic line current limiting scheme is developed. When a dc line is overloaded, the line current control will be automatically activated to regulate current within the allowable maximum value.

  • Shiqi Ji; Zheyu Zhang; Fred Wang
    CES Transactions on Electrical Machines and Systems
    2017

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    Research on high voltage (HV) silicon carbide (SiC) power semiconductor devices has attracted much attention in recent years. This paper overviews the development and status of HV SiC devices. Meanwhile, benefits of HV SiC devices are presented. The technologies and challenges for HV SiC device application in converter design are discussed. The state-of-the-art applications of HV SiC devices are also reviewed.

  • Yalong Li; Edward A. Jones; Fred Wang
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2017

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    Arm inductor in a modular multilevel converter (MMC) is used to limit the circulating current and dc short circuit fault current. The circulating current in MMC is dominated by second-order harmonic, which can be largely reduced with circulating current suppressing control. By analyzing the mechanism of the circulating current suppressing control, it is found that the circulating current at switching frequency becomes the main harmonic when suppression control is implemented. Unlike the second-order harmonic that circulates only within the three phases, switching frequency harmonic also flows through the dc side and may further cause high-frequency dc voltage harmonic. This paper develops the theoretical relationship between the arm inductance and switching frequency circulating current, which can be used to guide the arm inductance selection. The experimental results with a downscaled MMC prototype verify the existence of the switching frequency circulating current and its relationship with arm inductance.

  • 2017

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    Three-phase inverter-based multibus ac power systems could suffer from the harmonic instability issue. The existing impedance-based stability analysis method using the Nyquist stability criterion once requires the calculation of right-half-plane (RHP) poles of impedance ratios, which would result in a heavy computation burden for complicated systems. In order to analyze the harmonic stability of multibus ac systems consisting of both voltage-controlled and current-controlled inverters without the need for RHP pole calculation, this paper proposes two sequence-impedance-based harmonic stability analysis methods. Based on the summary of all major connection types including mesh, the proposed Method 1 can analyze the harmonic stability of multibus ac systems by adding the components one by one from nodes in the lowest level to areas in the highest system level, and accordingly, applying the stability criteria multiple times in succession. The proposed Method 2 is a generalized extension of the impedance-sum-type criterion to be used for the harmonic stability analysis of any multibus ac systems based on Cauchy's theorem. The inverter controller parameters can be designed in the forms of stability regions in the parameter space, by repetitively applying the proposed harmonic stability analysis methods. Experimental results of inverter-based multibus ac systems validate the effectiveness of the proposed harmonic stability analysis methods and parameter design approach.

  • 2016

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    The three-phase current source rectifier (CSR) features a step-down ac-dc voltage conversion function, smaller ac filter size compared with the traditional two-level voltage source rectifier, and inrush current limiting capability. However, large conduction loss of semiconductor devices has limited the wide application of traditional CSRs. In this paper, a new CSR topology, delta-type current source rectifier (DCSR), is proposed to reduce the conduction loss. The proposed rectifier has delta-type connections on its ac input side and its dc-link current can be shared by multiple devices at a given time. This paper introduces the DCSR's operation principle, modulation scheme, and design method. Based on the analysis, the conduction loss can be reduced by up to 20% with the proposed topology. An 8-kW prototype is then built to experimentally verify the performance of the DCSR.

  • Zhiqiang Wang; Xiaojie Shi; Leon M. Tolbert; Fred Wang; Zhenxian Liang; Daniel Costinett; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2016

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    This paper presents a comprehensive short-circuit ruggedness evaluation and numerical investigation of up-to-date commercial silicon carbide (SiC) MOSFETs. The short-circuit capability of three types of commercial 1200-V SiC MOSFETs is tested under various conditions, with case temperatures from 25 to 200 °C and dc bus voltages from 400 to 750 V. It is found that the commercial SiC MOSFETs can withstand short-circuit current for only several microseconds with a dc bus voltage of 750 V and case temperature of 200 °C. The experimental short-circuit behaviors are compared, and analyzed through numerical thermal dynamic simulation. Specifically, an electrothermal model is built to estimate the device internal temperature distribution, considering the temperature-dependent thermal properties of SiC material. Based on the temperature information, a leakage current model is derived to calculate the main leakage current components (i.e., thermal, diffusion, and avalanche generation currents). Numerical results show that the short-circuit failure mechanisms of SiC MOSFETs can be thermal generation current induced thermal runaway or high-temperature-related gate oxide damage.

  • Edward A. Jones; Fei Fred Wang; Daniel Costinett
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2016

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    Gallium nitride (GaN) power devices are an emerging technology that have only recently become available commercially. This new technology enables the design of converters at higher frequencies and efficiencies than those achievable with conventional Si devices. This paper reviews the characteristics and commercial status of both vertical and lateral GaN power devices, providing the background necessary to understand the significance of these recent developments. In addition, the challenges encountered in GaN-based converter design are considered, such as the consequences of faster switching on gate driver design and board layout. Other issues include the unique reverse conduction behavior, dynamic Rds,on, breakdown mechanisms, thermal design, device availability, and reliability qualification. This review will help prepare the reader to effectively design GaN-based converters, as these devices become increasingly available on a commercial scale.

  • Ren Ren; Bo Liu; Edward A. Jones; Fei Fred Wang; Zheyu Zhang; Daniel Costinett
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2016

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    Gallium nitride (GaN) heterojunction field-effect transistors are an enabling technology for high-density converter design. This paper proposes a three-level dc-dc converter with dual outputs based on enhancement-mode GaN devices, intended for use as a battery charger in aircraft applications. The charger can output either 28 or 270 V, selected with a jumper, to satisfy the two most common dc bus voltage requirements in airplanes. It operates as an LLC converter in the 28 V mode and as a buck converter in the 270 V mode. In both operation modes, the devices can realize zero voltage switching (ZVS). With the chosen modulation method, the converter can realize automatic voltage balancing of the flying capacitor and the frequency doubling function to act as an interleaved converter. For the LLC mode, the resonant frequency is twice the switching frequency of primary-side switches, and for the buck mode, the frequency of the output inductor current is also twice the switching frequency. This helps to reduce the size of magnetics while maintaining a low switching loss. Also, the converter utilizes a matrix transformer, with resonant parameters designed to reduce conduction loss and avoid ZVS failure. The operating principle of the converter is analyzed and then experimentally verified on a 1.5-kW prototype with 1 MHz resonant frequency.

  • Chongwen Zhao; Bradford Trento; Ling Jiang; Edward A. Jones; Bo Liu; Zheyu Zhang; Daniel Costinett; Fei Fred Wang; Leon M. Tolbert; John F. Jansen; Reid Kress; Rick Langley
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2016

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    High power density is a desirable feature of power electronics design, which prompts economic incentives for industrial applications. In this paper, a gallium nitride (GaN)-based 2-kVA single-phase inverter design was developed for the Google Little Box Challenge, which achieves a 102-W/in3 power density. First, the static and dynamic temperature-dependent characteristics of multiple SiC and enhancement-mode GaN FETs are investigated and compared. Based on the device testing results, several topologies of the inverter stage and different power decoupling solutions are compared with respect to the device volume, efficiency, and thermal requirements. Moreover, some design approaches for magnetic devices and the implementation of gate drives for GaN devices are discussed in this paper, which enable a compact and robust system. Finally, a dc notch filter and a hard switching full-bridge converter are combined as the proposed design for the prototype. A 2-kVA prototype is demonstrated, which meets the volume, efficiency, and thermal requirements. The performance of the prototype is verified by the experimental results.

  • Jing Wang; Liu Yang; Yiwei Ma; Jingxin Wang; Leon M. Tolbert; Fei Wang; Kevin Tomsovic
    IEEE Transactions on Power Electronics
    2016

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    A hardware testbed platform emulating multiple-area power system scenario dynamics has been established aiming at multiple time-scale real-time emulations. In order to mimic real power flow situations in the utility system, the load emulators have to behave like real ones in both their static and dynamic characteristics. A constant-impedance, constant-current, and constant-power (ZIP) model has been used for static load types, while a three-phase induction motor model has been built to represent dynamic load types. In this paper, ways of modeling ZIP and induction motor loads and the performance of each load emulator are discussed. Comparisons between simulation and experimental results are shown as well for the validation of the emulator behaviors. A real-time composite power load emulator is then demonstrated with desired characteristics and detailed transients for representing a power system PQ bus dynamics.

  • Fei Fred Wang; Zheyu Zhang
    CPSS Transactions on Power Electronics and Applications
    2016

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    This paper overviews the silicon carbide (SiC) technology. The focus is on the benefits of SiC based power electronics for converters and systems, as well as their ability in enabling new applications. The challenges and research trends on the design and application of SiC power electronics are also discussed.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett
    IEEE Transactions on Power Electronics
    2015

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    Double pulse test (DPT) is a widely accepted method to evaluate the switching characteristics of semiconductor switches, including SiC devices. However, the observed switching performance of SiC devices in a PWM inverter for induction motor drives is almost always worse than the DPT characterization, with slower switching speed, more switching losses, and more serious parasitic ringing. This paper systematically investigates the factors that limit the SiC switching performance from both the motor side and inverter side, including the load characteristics of induction motor and power cable, two more phase legs for the three-phase PWM inverter in comparison with the DPT, and the parasitic capacitive coupling effect between power devices and heat sink. Based on a three-phase PWM inverter with 1200 V SiC MOSFETs, test results show that the induction motor, especially with a relatively long power cable, will significantly impact the switching performance, leading to a switching time increase by a factor of 2, switching loss increase up to 30% in comparison with that yielded from DPT, and serious parasitic ringing with 1.5 μs duration, which is more than 50 times of the corresponding switching time. In addition, the interactions among the three phase legs cannot be ignored unless the decoupling capacitors are mounted close to each phase leg to support the dc bus voltage during switching transients. Also, the coupling capacitance due to the heat sink equivalently increases the junction capacitance of power devices; however, its influence on the switching behavior in the motor drives is small considering the relatively large capacitance of the motor load.

  • Zhiqiang Wang; Xiaojie Shi; Leon M. Tolbert; Fei Wang; Zhenxian Liang; Daniel Costinett; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2015

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    This paper presents a board-level integrated silicon carbide (SiC) mosfet power module for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI)-based gate driver capable of operating at 200 °C ambient temperature is designed and fabricated. The sourcing and sinking current capability of the gate driver are tested under various ambient temperatures. Also, a 1200 V/100 A SiC mosfet phase-leg power module is developed utilizing high temperature packaging technologies. The static characteristics, switching performance, and short-circuit behavior of the fabricated power module are fully evaluated at different temperatures. Moreover, a buck converter prototype composed of the SOI gate driver and SiC power module is built for high temperature continuous operation. The converter is operated at different switching frequencies up to 100 kHz, with its junction temperature monitored by a thermosensitive electrical parameter and compared with thermal simulation results. The experimental results from the continuous operation demonstrate the high temperature capability of the power module at a junction temperature greater than 225 °C.

  • Xiaojie Shi; Zhiqiang Wang; Bo Liu; Yiqi Liu; Leon M. Tolbert; Fred Wang
    IEEE Transactions on Power Electronics
    2015

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    This paper presents the analysis and control of a multilevel modular converter (MMC)-based HVDC transmission system under three possible single-line-to-ground fault conditions, with special focus on the investigation of their different fault characteristics. Considering positive-, negative-, and zero-sequence components in both arm voltages and currents, the generalized instantaneous power of a phase unit is derived theoretically according to the equivalent circuit model of the MMC under unbalanced conditions. Based on this model, a novel double-line frequency dc-voltage ripple suppression control is proposed. This controller, together with the negative- and zero-sequence current control, could enhance the overall fault-tolerant capability of the HVDC system without additional cost. To further improve the fault-tolerant capability, the operation performance of the HVDC system with and without single-phase switching is discussed and compared in detail. Simulation results from a three-phase MMC-HVDC system generated with MATLAB/Simulink are provided to support the theoretical analysis and proposed control schemes.

  • Xiaojie Shi; Bo Liu; Zhiqiang Wang; Yalong Li; Leon M. Tolbert; Fei Wang
    IEEE Transactions on Industrial Electronics
    2015

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    Featuring modularity and high efficiency, a modular multilevel converter (MMC) has become a promising topology in high-voltage direct-current transmission systems. However, its distributed capacitors lead to a more complicated startup process than that of a two-level converter. To fully understand this issue, the charging loops of an MMC rectifier and an MMC inverter during an uncontrolled precharge period are analyzed in this paper, with special focus on the necessity of additional capacitor charging schemes. Moreover, a small-signal model of a capacitor charging loop is first derived according to the internal dynamics of the MMC inverter. Based on this model, a novel startup strategy incorporating an averaging capacitor voltage loop and a feedforward control is proposed, which is capable of an enhanced dynamic response and system stability without sacrificing voltage control precision. The design considerations of the control strategy are also given in detail. Simulation results from a back-to-back MMC system supplying passive loads and experimental results from a scaled-down MMC prototype are provided to support the theoretical analysis and the proposed control scheme.

  • Fan Xu; Ben Guo; Zhuxian Xu; Leon M. Tolbert; Fei Wang; Benjamin J. Blalock
    IEEE Transactions on Industry Applications
    2015

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    This paper presents the paralleling operation of three-phase current-source rectifiers (CSRs) as the front-end power conversion stage of data center power supply systems based on 400-Vdc power delivery architecture, which has been proven to have higher efficiency than traditional ac architectures. A control algorithm of paralleled three-phase CSRs is introduced to achieve balanced outputs and individual rectifier module hot swap, which are required by power supply systems. By using silicon carbide (SiC) power semiconductors, SiC MOSFETs, and Schottky diodes, the power losses of the front-end stage are reduced, and the power supply system efficiency can be further increased. The prototype of a 19-kW front-end rectifier to convert 480 Vac,rms to 400 Vdc, based on three paralleled three-phase CSRs, is developed. Each CSR is an all-SiC converter and designed for high efficiency, and the front-end stage full-load efficiency is greater than 98% from experimental tests. The balanced outputs and individual converter hot swap are realized in the hardware prototype too.

  • Dong Jiang; Fei Wang
    IEEE Transactions on Power Electronics
    2014

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    Current ripple is generated by pulse width modulation (PWM) switching in multiphase voltage source converters (VSCs). This letter introduces a general and fast current ripple prediction method for multiphase VSCs with arbitrary phase numbers. An equivalent converter-load model is derived for the n -phase converter system. By combining the common-mode voltage of both converter terminal and load, the equivalent circuit for each phase can be modeled. The voltage dropping on the ac inductor can be calculated for the 2 n + 2 zones in each switching cycle based on the equivalent circuit for each phase. Then the current ripple can be reconstructed based on the linear di/dt model in each zone. Simulation examples of five- and six-phase converters prove that the current prediction method is accurate. With this real-time prediction method, the current ripple can be controlled in application. An application example of five-phase variable switching frequency PWM is introduced to control the peak current ripple and reduce the switching losses.

  • Puqi Ning; Fei Wang; Khai D. T. Ngo
    IEEE Transactions on Power Electronics
    2014

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    An analytical model has been developed for predicting the forced-air cooling system performance, including a detailed optimization process to minimize the total weight. With a design example in a high-density high-temperature SiC converter, the presented design method was verified through numerical simulations and experiments.

  • Dong Jiang; Fei Wang
    IEEE Transactions on Industry Applications
    2014

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    The three-phase pulsewidth-modulation (PWM) converter is one of the most widely used topologies for power conversion. In order to design PWM methods, the influence of PWM methods on the current ripple is needed. This paper studies the current ripple of a three-phase PWM converter with general PWM methods for the design and control of this kind of converter. The current ripple is analyzed with eight different Thevenin equivalent circuits for the eight different voltage vectors. Then, the current-ripple slope and effective time could be achieved for every period. The current ripple could be predicted with both peak and rms values. Analytical predicted results show that discontinuous PWM could generate obviously bigger current ripples than space vector PMW for both peak and rms values with the same conditions. Simulation and experiments are built to verify the analytical results, proving that the theoretical prediction is valid. This analysis provides the basis for the design and control of the PWM method for converters.

  • Zhenxian Liang; Puqi Ning; Fred Wang
    IEEE Transactions on Power Electronics
    2014

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    A thermally integrated packaging structure for an all silicon carbide (SiC) power module was used to realize highly efficient cooling of power semiconductor devices through direct bonding of the power stage and a cold baseplate. The prototype power modules composed of SiC metal-oxide-semiconductor field-effect transistors and Schottky barrier diodes demonstrate significant improvements such as low-power losses and low-thermal resistance. Direct comparisons to their silicon counterparts, which are composed of insulated gate bipolar transistors and PiN diodes, as well as conventional thermal packaging, were experimentally performed. The advantages of this SiC module in efficiency and power density for power electronics systems have also been identified, with clarification of the SiC attributes and packaging advancements.

  • Puqi Ning; Zhenxian Liang; Fred Wang
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2014

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    To further reduce system costs and package volumes of hybrid electric vehicles, it is important to optimize the power module and associated cooling system. This paper reports the thermal performance evaluation and analysis of three commercial power modules and a proposed planar module with different cooling system. Results show that power electronics can be better merged with the mechanical environment. Experiments and simulations were conducted to help further optimization.

  • Zhenxian Liang; Puqi Ning; Fred Wang; Laura Marlino
    IEEE Journal of Emerging and Selected Topics in Power Electronics
    2014

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    A multilayer planar interconnection structure was used for the packaging of liquid-cooled automotive power modules. The power semiconductor switch dies are sandwiched between two symmetric substrates, providing planar electrical interconnections and insulation. Two minicoolers are directly bonded to the outside of these substrates, allowing double-sided, integrated cooling. The power switch dies are orientated in a face-up/face-down 3-D interconnection configuration to form a phase leg. The bonding areas between the dies and substrates, and the substrates and coolers are designed to use identical materials and are formed in one heating process. A special packaging process has been developed so that high-efficiency production can be implemented. Incorporating high-efficiency cooling and low-loss electrical interconnections allows dramatic improvements in systems' cost, and electrical conversion efficiency. These features are demonstrated in a planar bond-packaged prototype of a 200 A/1200 V phase-leg power module made of silicon (Si) insulated gate bipolar transistor and PiN diodes.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2014

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    In a phase-leg configuration, the high-switching-speed performance of silicon carbide (SiC) devices is limited by the interaction between the upper and lower devices during the switching transient (crosstalk), leading to additional switching losses and overstress of the power devices. To utilize the full potential of fast SiC devices, this paper proposes two gate assist circuits to actively suppress crosstalk on the basis of the intrinsic properties of SiC power devices. One gate assist circuit employs an auxiliary transistor in series with a capacitor to mitigate crosstalk by gate loop impedance reduction. The other gate assist circuit consists of two auxiliary transistors with a diode to actively control the gate voltage for crosstalk elimination. Based on CREE CMF20120D SiC MOSFETs, the experimental results show that both active gate drivers are effective to suppress crosstalk, enabling turn-on switching losses reduction by up to 17%, and negative spurious gate voltage minimization without the penalty of decreasing the switching speed. Furthermore, both gate assist circuits, even without a negative isolated power supply, are more effective in improving the switching behavior of SiC devices in comparison to the conventional gate driver with a -2 V turn-off gate voltage. Accordingly, the proposed active gate assist circuits are simple, efficient, and cost-effective solutions for crosstalk suppression.

  • Zhiqiang Wang; Xiaojie Shi; Leon M. Tolbert; Fei Wang; Benjamin J. Blalock
    IEEE Transactions on Power Electronics
    2014

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    This paper presents an active gate driver (AGD) for IGBT modules to improve their overall performance under normal condition as well as fault condition. Specifically, during normal switching transients, a di/dt feedback controlled current source and current sink is introduced together with a push-pull buffer for dynamic gate current control. Compared to a conventional gate drive strategy, the proposed one has the capability of reducing the switching loss, delay time, and Miller plateau duration during turn-on and turn-off transient without sacrificing current and voltage stress. Under overcurrent condition, it provides a fast protection function for IGBT modules based on the evaluation of fault current level through the di/dt feedback signal. Moreover, the AGD features flexible protection modes, which overcomes the interruption of converter operation in the event of momentary short circuits. A step-down converter is built to evaluate the performance of the proposed driving schemes under various conditions, considering variation of turn-on/off gate resistance, current levels, and short-circuit fault types. Experimental results and detailed analysis are presented to verify the feasibility of the proposed approach.

  • Shengnan Li; Leon M. Tolbert; Fei Wang; Fang Zheng Peng
    IEEE Transactions on Power Electronics
    2014

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    This paper proposes a novel packaging method for insulated-gate bipolar transistor (IGBT) modules based on the concepts of P-cell and N-cell. The novel packaging reduces the stray inductance in the current commutation path in a phase-leg module and hence improves the switching behavior. A P-cell- and N-cell-based module and a conventional module are designed. Using finite-element-analysis-based Ansys Q3D Extractor, electromagnetic simulations are conducted to extract the stray inductance from the two modules. Two prototype phase-leg modules based on the two different designs are fabricated. The parasitics are measured using a precision impedance analyzer. Finally, a double pulse tester based-switching characterization is performed to illustrate the effect of stray inductance reduction in the proposed packaging design. The experimental results show the reduction in overshoot voltage with the proposed layout.

  • Zhiqiang Wang; Xiaojie Shi; Yang Xue; Leon M. Tolbert; Fei Wang; Benjamin J. Blalock
    IEEE Transactions on Industrial Electronics
    2014

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    Overcurrent protection of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) remains a challenge due to lack of practical knowledge. This paper presents three overcurrent protection methods to improve the reliability and overall cost of SiC MOSFET-based converters. First, a solid-state circuit breaker (SSCB) composed primarily by a Si IGBT and a commercial gate driver IC is connected in series with the dc bus to detect and clear overcurrent faults. Second, the desaturation technique using a sensing diode to detect the drain-source voltage under overcurrent faults is implemented as well. Third, a novel active overcurrent protection scheme through dynamic evaluation of fault current level is proposed. The design considerations and potential issues of the protection methods are described and analyzed in detail. A phase-leg configuration-based step-down converter is built to evaluate the performance of the protection schemes under various conditions, considering variation of fault type, decoupling capacitance, protection circuit parameters, etc. Finally, a comparison is made in terms of fault response time, temperature-dependent characteristics, and applications to help designers select a proper protection method.

  • Ruxi Wang; Dushan Boroyevich; Puqi Ning; Zhiqiang Wang; Fei Wang; Paolo Mattavelli; Khai D. T. Ngo; Kaushik Rajashekara
    IEEE Transactions on Power Electronics
    2013

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    High-temperature (HT) converters have gained importance in industrial applications where the converters operate in a harsh environment, such as in hybrid electrical vehicles, aviation, and deep-earth petroleum exploration. These environments require the converter to have not only HT semiconductor devices (made of SiC or GaN), but also reliable HT packaging, HT gate drives, and HT control electronics. This paper describes a detailed design process for an HT SiC three-phase PWM rectifier that can operate at ambient temperatures above 100°C. SiC HT planar structure packaging is designed for the main semiconductor devices, and an edge-triggered HT gate drive is also proposed to drive the designed power module. The system is designed to make use of available HT components, including the passive components, silicon-on-insulator chips, and auxiliary components. Finally, a 1.4 kW lab prototype is tested in a harsh environment for verification.

  • 2013

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    Compared with the widely used constant switching frequency pulse-width-modulation (PWM) method, variable switching frequency PWM can benefit more because of the extra freedom. Based on the analytical expression of current ripple of three-phase converters, variable switching frequency control methods are proposed to satisfy different ripple requirements. Switching cycle Ts is updated in DSP in every interruption period based on the ripple requirement. Two methods are discussed in this paper. The first method is designed to arrange the current ripple peak value within a certain value and can reduce the equivalent switching frequency and electromagnetic interference (EMI) noise; the second method is designed to keep ripple current RMS value constant and reduce the EMI noise. Simulation and experimental results show that variable switching frequency control could improve the performance of EMI and efficiency without impairing the power quality.

  • Fan Xu; Timothy J. Han; Dong Jiang; Leon M. Tolbert; Fei Wang; Jim Nagashima; Sung Joon Kim; Srikanth Kulkarni; Fred Barlow
    IEEE Transactions on Power Electronics
    2013

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    In this paper, a fully integrated silicon carbide (SiC)-based six-pack power module is designed and developed. With 1200-V, 100-A module rating, each switching element is composed of four paralleled SiC junction gate field-effect transistors (JFETs) with two antiparallel SiC Schottky barrier diodes. The stability of the module assembly processes is confirmed with 1000 cycles of -40°C to +200°C thermal shock tests with 1.3°C/s temperature change. The static characteristics of the module are evaluated and the results show 55 mΩ on-state resistance of the phase leg at 200°C junction temperature. For switching performances, the experiments demonstrate that while utilizing a 650-V voltage and 60-A current, the module switching loss decreases as the junction temperature increases up to 150°C. The test setup over a large temperature range is also described. Meanwhile, the shoot-through influenced by the SiC JFET internal capacitance as well as package parasitic inductances are discussed. Additionally, a liquid cooled three-phase inverter with 22.9 cm × 22.4 cm × 7.1 cm volume and 3.53-kg weight, based on this power module, is designed and developed for electric vehicle and hybrid electric vehicle applications. A conversion efficiency of 98.5% is achieved at 10 kHz switching frequency at 5 kW output power. The inverter is evaluated with coolant temperature up to 95°C successfully.

  • Fan Xu; Ben Guo; Leon M. Tolbert; Fei Wang; Benjamin J. Blalock
    IEEE Transactions on Industry Applications
    2013

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    The low power losses of silicon carbide (SiC) devices provide new opportunities to implement an ultra high-efficiency front-end rectifier for data center power supplies based on a 400-Vdc power distribution architecture, which requires high conversion efficiency in each power conversion stage. This paper presents a 7.5-kW high-efficiency three-phase buck rectifier with 480-Vac,rms input line-to-line voltage and 400-Vdc output voltage using SiC MOSFETs and Schottky diodes. To estimate power devices' losses, which are the dominant portion of total loss, the method of device evaluation and loss calculation is proposed based on a current source topology. This method simulates the current commutation process and estimates devices' losses during switching transients considering devices with and without switching actions in buck rectifier operation. Moreover, the power losses of buck rectifiers based on different combinations of 1200-V power devices are compared. The investigation and comparison demonstrate the benefits of each combination, and the lowest total loss in the all-SiC rectifier is clearly shown. A 7.5-kW prototype of the all-SiC three-phase buck rectifier using liquid cooling is fabricated and tested, with filter design and switching frequency chosen based on loss minimization. A full-load efficiency value greater than 98.5% is achieved.

  • Puqi Ning; Di Zhang; Rixin Lai; Dong Jiang; Fred Wang; Dushan Boroyevich; Rolando Burgos; Kamiar Karimi; Vikram D. Immanuel; Eugene V. Solodovnik
    IEEE Industrial Electronics Magazine
    2013

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    This article presents the development and experimental performance of a 10-W, all-silicon carbide (SiC), 250 °C junction temperature, high-powerdensity, three-phase ac-dc-ac converter. The electromagnetic interference filter, thermal system, high-temperature package, and gate drive design are discussed in detail. Tests confirming the feasibility and validating the theoretical basis of the prototype converter system are described. Over the last 20 years, advances in industrial and research efforts in electronic power conversion have steadily been moving toward higher power densities, which has resulted in improvements in converter system performance; reductions in physical size; and reductions in mass, weight, and cost. However, this pushes the limits of the existing control, packaging, and thermal management technology for power converter systems.

  • Zhuxian Xu; Dong Jiang; Ming Li; Puqi Ning; Fei Fred Wang; Zhenxian Liang
    IEEE Transactions on Power Electronics
    2013

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    A Si insulated-gate bipolar transistor (IGBT) phase-leg module is developed for operating at 200°C in hybrid electric vehicle applications utilizing the high temperature packaging technologies and appropriate thermal management. The static and switching electrical characteristics of the fabricated power module are tested at various temperatures, showing that the module can operate reliably with increased but acceptable losses at 200°C. The criterion on thermal performance is given to prevent thermal runaway caused by fast increase of the leakage current during a high temperature operation. Afterward, the thermal management system is designed to meet the criterion, the performance of which is evaluated with experiment. Furthermore, two temperature-sensitive electrical parameters, on-state voltage drop and the switching time, are employed for thermal impedance characterization and the junction temperature measurement during converter operation, respectively. Finally, a 10-kW buck converter prototype composed of the module assembly is built and operated at the junction temperature up to 200°C. The experimental results demonstrate the feasibility of operating Si device-based converters continuously at 200°C.

  • Rolando Burgos; Gang Chen; Fred Wang; Dushan Boroyevich; Willem Gerhardus Odendaal; Jacobus Daniel Van Wyk
    IEEE Transactions on Aerospace and Electronic Systems
    2012

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    This paper presents a reliability-oriented design (ROD) procedure for three-phase power converters in aircraft applications. These require the highest reliability levels for all its components-as high as space applications; hence the need to maximize the reliability of three-phase power converters, which are in increasing demand and use in commercial and military aircrafts as a result of the more-electric aircraft (MEA) initiative. Specifically, the proposed procedure takes reliability up-front in the design process of power converters, carrying out the design in three steps. First, the identification of critical system components; second, the assessment of reliability factors such as risk analysis, failure mode analysis, and fishbone diagrams; and third, the actual design, which is carried out by minimizing system complexity and stress, and by the use of the most reliable components, materials, and structures. To this end, reliability models were developed for all critical components based on the military handbook MIL-HDBK-217F, and field and vendor data. For verification purposes, the paper includes the ROD of a 60 kW three-phase power converter for aircraft applications together with experimental results of the prototype constructed.

  • Parag Kshirsagar; Rolando P. Burgos; Jihoon Jang; Alessandro Lidozzi; Fei Wang; Dushan Boroyevich; Seung-Ki Sul
    IEEE Transactions on Industry Applications
    2012

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    This paper presents a complete design methodology for the sensorless vector control of permanent-magnet synchronous machine (PMSM) motor drives in fan-type applications. The proposed strategy is built over a linear asymptotic state observer used to estimate the PMSM back EMF and a novel tracking controller based on a phase-locked loop system, which, by synchronizing the estimated and actual d-q frames, estimates the rotor speed and position. This paper presents the complete derivation of all associated control loops, namely, state observer; tracking controller; d-q-axis current regulator; speed controller; an antisaturation control loop, which provides inherent operation in the flux-weakening region; and all corresponding antiwindup loops. Detailed design rules are provided for each of these loops, respectively verified through time-domain simulations, frequency-response analysis, and experimental results using a three-phase 7.5-kW PMSM motor drive, validating both the design methodology and the expected performance attained by the proposed control strategy.

  • This paper presents a control method to minimize the total flux in the integrated interphase inductors of paralleled, interleaved three-phase two-level voltage-source converters (VSCs) using discontinuous space vector modulation (DPWM). Specifically, different inductor structures used to limit circulating currents are introduced and compared, and the structure and flux distribution of two types of integrated interphase inductors are analyzed in detail. Based on that, a control method to minimize the total flux in such integrated interphase inductor is proposed for a parallel converter system using interleaved DPWM. The method eliminates the circulating currents during the peak range of the converter output currents; hence the total flux is minimized and only determined by the system load requirements. This control method introduces very limited additional switching actions, which do not significantly affect the converter electrothermal design. Experimental results verify the analysis and the feasibility of the proposed control method.

  • Dong Dong; Timothy Thacker; Igor Cvetkovic; Rolando Burgos; Dushan Boroyevich; Fred Wang; Glenn Skutt
    IEEE Transactions on Smart Grid
    2012

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    Robust system control design and seamless transition between various modes of operation are paramount for multifunctional converters in microgrid systems. This paper proposes a control system for single-phase bidirectional PWM converters for residential power level microgrid systems which is robust and can tolerate transitions between the different modes of operation. This is achieved by means of a common inner ac current-loop. Each of the operating modes has an individually designed outer loop performing the corresponding regulation tasks, most commonly including the ac voltage and the dc voltage regulation. A modified , phase-locked loop (PLL) system is used for system-level operation with both small steady-state error and fast response; and a novel islanding detection algorithm based on PLL stability is proposed to facilitate the transition between grid-connected mode and stand-alone mode. Finally, a frequency-response based design procedure for the proposed control system is presented in detail for all operating modes, and its performance is verified experimentally using a DSP-controlled 6 kW 120 V rms (ac)/ 300 V (dc) laboratory converter prototype.

  • Honggang Sheng; Fei Wang; C. Wesley Tipton IV
    IEEE Transactions on Power Electronics
    2012

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    Fault detection and protection is an important design aspect for any power converter, especially in high-power high-voltage applications, where cost of failure can be high. The three-level dc-dc converter and its varied derivatives are attractive topologies in high-voltage high-power converter applications. The protection method can not only prevent the system failure against unbalanced voltage stresses on the switches, but also provide a remedy for the system as faults occur and save the remaining components. The three-level converter is subject to voltage unbalance in certain abnormal conditions, which can result in switch overvoltage and system failure. The reasons for the unbalanced voltage stresses are fully investigated and categorized. The solutions to each abnormal condition are introduced. In addition to the voltage unbalance, the three-level converters can be protected against multiple faults by the proposed protection method through monitoring the flying capacitor voltage. Phenomena associated with each fault are thoroughly analyzed and summarized. The protection circuit is simple and can be easily implemented, while it can effectively protect the three-level converters and its derivatives, which has been verified by the experiment with a three-level parallel resonant converter.

  • Puqi Ning; Fred Wang; Khai D. T. Ngo
    IEEE Transactions on Power Electronics
    2011

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    To take full advantage of silicon carbide semiconductor devices, high-temperature device packaging needs to be developed. This paper describes potential defects from design and fabrication procedures, and presents a systematic electrical evaluation process to detect such defects. This systematic testing procedure can rapidly detect many defects and reduce the risk in high-temperature packaging testing. A multichip module development procedure that uses this testing procedure is also presented and demonstrated with an example.

  • Ruxi Wang; Fei Wang; Dushan Boroyevich; Rolando Burgos; Rixin Lai; Puqi Ning; Kaushik Rajashekara
    IEEE Transactions on Power Electronics
    2011

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    It is well known that single-phase pulse width modulation rectifiers have second-order harmonic currents and corresponding ripple voltages on the dc bus. The low-frequency harmonic current is normally filtered using a bulk capacitor in the bus, which results in low power density. However, pursuing high power density in converter design is a very important goal in the aerospace applications. This paper studies methods for reducing the energy storage capacitor for single-phase rectifiers. The minimum ripple energy storage requirement is derived independently of a specific topology. Based on the minimum ripple energy requirement, the feasibility of the active capacitor's reduction schemes is verified. Then, we propose a bidirectional buck-boost converter as the ripple energy storage circuit, which can effectively reduce the energy storage capacitance. The analysis and design are validated by simulation and experimental results.

  • 2011

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    This paper presents a control method to limit the common-mode (CM) circulating current between paralleled three-phase two-level voltage-source converters (VSCs) with discontinuous space-vector pulsewidth modulation (DPWM) and interleaved switching cycles. This CM circulating current can be separated into two separate components based on their frequency; the high-frequency component, close to the switching frequency, can be effectively limited by means of passive components; the low-frequency component, close to the fundamental frequency, embodies the jumping CM circulating current observed in parallel VSCs. This is the main reason why it is usually recommended not to implement discontinuous and interleaving PWM together. The origin of this low-frequency circulating current is analyzed in detail, and based on this, a method to eliminate its presence is proposed by impeding the simultaneous use of different zero vectors between the converters. This control method only requires six additional switching actions per line cycle, presenting a minimum impact on the converter thermal design. The analysis and the feasibility of the control method are verified by simulation and experimental results.

  • Timothy Thacker; Dushan Boroyevich; Rolando Burgos; Fei Wang
    IEEE Transactions on Industrial Electronics
    2011

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    A crucial component of grid-connected converters is the phase-locked loop (PLL) control subsystem that tracks the grid voltage's frequency and phase angle. Therefore, accurate fast-responding PLLs for control and protection purposes are required to provide these measurements. This paper proposes a novel feedback mechanism for single-phase PLL phase detectors using the estimated phase angle. Ripple noise appearing in the estimated frequency, most commonly the second harmonic under phase-lock conditions, is reduced or eliminated without the use of low-pass filters, which can cause delays to occur and limits the overall performance of the PLL response to dynamic changes in the system. The proposed method has the capability to eliminate the noise ripple entirely and, under extreme line distortion conditions, can reduce the ripple by at least half. Other modifications implemented through frequency feedback are shown to decrease the settling time of the PLL up to 50%. Mathematical analyses with the simulated and experimental results are provided to confirm the validity of the proposed methods.

  • Dong Jiang; Rixin Lai; Fei Wang; Fang Luo; Shuo Wang; Dushan Boroyevich
    IEEE Transactions on Power Electronics
    2011

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    The problem of electromagnetic interference (EMI) plays an important role in the design of power electronic converters, especially for airplane electrical systems. This paper explores techniques to reduce EMI noise in three-phase active front-end rectifier. The Vienna-type rectifier is used as the object. The design approach introduced in this paper is using a high-density EMI filter to satisfy the EMI standard. Design methodology is introduced in the paper by a three-stage LC- LC-L filter structure. In particular, the cause of high noise at high frequencies is studied in experiments, and the coupling effect of the final-stage capacitor and inductors is investigated. In order to reduce the EMI noise in the mid-frequency range, the application of random pulsewidth modulation (PWM) is also presented. The performance of random PWM in a Vienna-type rectifier is verified by theoretical analysis and experimental results. The approaches discussed in this paper significantly reduce the EMI noise in the Vienna-type rectifier, and therefore, the filter size can also be reduced.

  • Dong Dong; Timothy Thacker; Rolando Burgos; Fei Wang; Dushan Boroyevich
    IEEE Transactions on Power Electronics
    2011

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    This paper comprehensively investigates and compares different multiloop linear control schemes for single-phase pulsewidth modulation inverters, both in stationary and synchronous (d -q) frames, by focusing on their steady-state error under different loading conditions. Specifically, it is shown how proportional plus resonant (P + R) control and load current feedback (LCF) control can, respectively, improve the steady-state and transient performance of the inverter, leading to the proposal of a PID + R + LCF control scheme. Furthermore, the LCF control and capacitive current feedback control schemes are shown to be subject to stability issues under second and higher order filter loads. Additionally, the equivalence between the stationary frame and d -q frame controllers is discussed depending on the orthogonal term generation method, and a d-q frame voltage control strategy is proposed eliminating the need for the generation of this orthogonal component. This is achieved while retaining all the advantages of operating in the synchronous d-q frame, i.e., zero steady-state error and ease of implementation. All theoretical findings are validated experimentally using a 1.5 kW laboratory prototype.

  • Rixin Lai; Fei Wang; Rolando Burgos; Dushan Boroyevich; Di Zhang; Puqi Ning
    IEEE Transactions on Industry Applications
    2010

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    The SiC JFET is an attractive semiconductor device due to its superior switching performance and high-temperature operating capability. Its shoot-through protection remains a challenge due to the limited practical knowledge existent on this device and due to its inherent normally on nature. Addressing this limitation, this paper presents a novel shoot-through protection scheme in which a bidirectional switch, compounded by a Si insulated-gate bipolar transistor (IGBT) and a relay,is embedded into the dc-link midpoint in order to detect and clear shoot-through faults, taking advantage of the well-known desaturation protection schemes of IGBTs to protect SiC JFETs. This paper describes in detail the proposed protection mechanism and its circuit design, presenting as well the experimental results that verified the effectiveness of the proposed scheme using, first, Si MOSFETs and second, a 10-kW ac-ac converter system using SiC JFETs.

  • Rixin Lai; Fred Wang; Puqi Ning; Di Zhang; Dong Jiang; Rolando Burgos; Dushan Boroyevich; Kamiar J. Karimi; Vikram D. Immanuel
    IEEE Industrial Electronics Magazine
    2010

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    This article presents the development and experimental performance of a 10-kW high-power-density three-phase ac-dc-ac converter. The converter consists of a Vienna-type rectifier front end and a two-level voltage source inverter (VSΓ)To reduce the switching loss and achieve a high operating junction temperature, the SiC JFET and SiC Schottky diode are used. Design considerations for the phase-leg units, gate drivers, integrated input filter-combining electromagnetic interference (EMI) and boost inductor stages-and the system protection are described in full detail. Experiments are carried out under different operating conditions, and the results obtained verify the performance and feasibility of the proposed converter system.

  • Fang Luo; Shuo Wang; Fei Wang; Dushan Boroyevich; Nicolas Gazel; Yong Kang; Andrew Carson Baisden
    IEEE Transactions on Power Electronics
    2010

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    Common-mode (CM) choke saturation is a practical problem in CM filter applications. It is generally believed that the leakage inductance of CM chokes makes the core saturated. This paper analyzes two new mechanisms for CM choke saturation due to CM voltage, and these mechanisms are verified in experiment. CM choke saturation is particularly important for motor drive systems, which have a high CM voltage and comparably higher stray grounding capacitance. A model is established to describe the relationship between the CM voltage and the volume of the CM magnetic components. According to the analysis, line impedance stabilization networks (LISNs) play an important role in the design of CM magnetic components.

  • Puqi Ning; Thomas Guangyin Lei; Fei Wang; Guo-Quan Lu; Khai D. T. Ngo; Kaushik Rajashekara
    IEEE Transactions on Power Electronics
    2010

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    This paper presents the design, development, and testing of a phase-leg power module packaged by a novel planar packaging technique for high-temperature (250°C) operation. The nanosilver paste is chosen as the die-attach material as well as playing the key functions of electrically connecting the devices' pads. The electrical characteristics of the SiC-based power semiconductors, SiC JFETs, and SiC Schottky diodes have been measured and compared before and after packaging. No significant changes (<;5%) are found in the characteristics of all the devices. Prototype module is fabricated and operated up to 400 V, 1.4 kW at junction temperature of 250°C in the continuous power test. Thermomechanical robustness has also been investigated by passive thermal cycling of the module from -55°C to 250°C. Electrical and mechanical performances of the packaged module are characterized and considered to be reliable for at least 200 cycles.

  • Shuo Wang; Yoann Yorrick Maillet; Fei Wang; Rixin Lai; Fang Luo; Dushan Boroyevich
    IEEE Transactions on Industrial Electronics
    2010

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    High-frequency common-mode (CM) electromagnetic-interference (EMI) noise is difficult to suppress in electronics systems. EMI filters are used to suppress CM noise, but their performance is greatly affected by the parasitic effects of the grounding paths. In this paper, the parasitic effects of the grounding paths on an EMI filter's performance are investigated in a motor-drive system. The effects of the mutual inductance between two grounding paths are explored. Guidelines for the grounding of CM EMI filters are derived. Simulations and experiments are finally carried out to verify the theoretical analysis.

  • Andrew Carson Baisden; Dushan Boroyevich; Fei Wang
    IEEE Transactions on Industry Applications
    2010

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    Terminal models have been used for various applications. In this paper, a three-terminal model is proposed for electromagnetic-interference (EMI) characterization. The model starts with a power electronic system at a particular operating condition and creates a unique linearized equivalent circuit. Impedances and current/voltage sources define the noise throughout the entire EMI frequency spectrum. All parameters needed to create the model are clearly defined to ensure convergence and maximize accuracy. In addition, the accuracy of the model is confirmed up to 100 MHz for a dc-dc boost converter using both simulation and experimental validation.

  • Rixin Lai; Yoann Maillet; Fred Wang; Shuo Wang; Rolando Burgos; Dushan Boroyevich
    IEEE Transactions on Power Electronics
    2010

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    This letter presents a novel integration approach for the electromagnetic interference choke. A low-permeability differential-mode (DM) choke is placed within the open window of the common-mode (CM) choke. Both chokes share the same winding structure. With the proposed approach, the footprint of inductors is greatly reduced, and high-DM inductance can be achieved. First, small-signal measurement is carried out to demonstrate the design concept and the symmetry of the proposed structure. Then large-signal experimental results verify the attenuation characteristics, as well as the thermal performance.

  • Shuo Wang; Yoann Yorrick Maillet; Fei Wang; Dushan Boroyevich; Rolando Burgos
    IEEE Transactions on Power Electronics
    2010

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    This paper begins with an analysis of the common-mode (CM) noise in a motor drive system. Based on the developed CM noise model, two cancellation techniques, CM noise voltage cancellation and CM noise current cancellation, are discussed. The constraints and impedance requirements for these two cancellation methods are investigated. An active filter with a feedforward current cancellation technique is proposed, implemented, and tested, and techniques to improve the performance of active filters are explored. It is found that due to the limitations of speed, power loss, and gain bandwidth of active filters, active electromagnetic interference (EMI) filters are not good at suppressing high di/dt or high amplitude noise current. Hybrid filters that include a passive filter and an active filter are proposed to overcome the shortcomings of active filters. Hybrid EMI filters are investigated based on the impedance requirements and frequency responses between the passive and active filters. The experiments show that the proposed active filter can greatly reduce noise by up to 50 dB at low frequencies (LFs), and therefore, the corner frequency of the passive filter can be increased considerably; as a result, the CM inductance of the passive filter is greatly reduced. The power loss of the proposed active EMI filter can be well-controlled in the experiments.

  • Yoann Maillet; Rixin Lai; Shuo Wang; Fei Wang; Rolando Burgos; Dushan Boroyevich
    IEEE Transactions on Power Electronics
    2010

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    This paper presents strategies to reduce both differential-mode (DM) and common-mode (CM) noise using a passive filter in a dc-fed motor drive. The paper concentrates on the type of grounding and the components to optimize filter size and performance. Grounding schemes, material comparison between ferrite and nanocrystalline cores, and a new integrated filter structure are presented. The integrated structure maximizes the core window area and increases the leakage inductance by integrating both CM and DM inductances onto one core. Small-signal and large-signal experiments validate the structure, showing it to have reduced filter size and good filtering performance when compared with standard filters at both low and high frequencies.

  • Di Zhang; Fred Wang; Rolando Burgos; Rixin Lai; Dushan Boroyevich
    IEEE Transactions on Industry Applications
    2010

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    This paper presents a comprehensive analysis studying the impact of interleaving on harmonic currents and voltages on the ac side of paralleled three-phase voltage-source converters. The analysis performed considers the effects of modulation index, pulsewidth-modulation (PWM) schemes, and interleaving angle. Based on the analysis, the impact of interleaving on the design of ac passive components, such as ac line inductor and electromagnetic interference (EMI) filter, is discussed. The results show that interleaving has the potential benefit to reduce ac passive components. To maximize such a benefit, the interleaving angle should be optimized according to the system requirements, including total harmonic distortion limit, ripple limit, or EMI standards, while considering operating conditions, such as modulation index and PWM schemes. Experimental results have verified the analysis results.

  • Hongfang Wang; Fred Wang; Junhong Zhang
    IEEE Transactions on Electron Devices
    2008

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    In order to help device selection and optimal application in high-power-density converter designs, a new power semiconductor device figure of merit (FOM)-power density FOM-is proposed, with consideration of power device conduction and switching losses, thermal characteristics, and package. The FOM is derived based on the device theory, and its validity and usefulness are demonstrated with a practical design example.

  • Dianbo Fu; Fred C. Lee; Yang Qiu; Fred Wang
    IEEE Transactions on Power Electronics
    2008

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    This paper proposes a variable-frequency zero-voltage-switching (ZVS) three-level LCC resonant converter that is able to utilize the parasitic components of the high turns-ratio transformer. By applying a three-level structure to the primary side, the voltage stress of the primary switches is half of the input voltage. Low-voltage MOSFETs with better performance can be used in this converter, and zero-current-switching (ZCS) is achieved for rectifier diodes. By applying a magnetic integration technique, only one magnetic component is required in this converter. The power factor concept of resonant converters is proposed and analyzed, and a novel constant power-factor control scheme is proposed. Based on this control strategy, the circulating energy of resonant converters is considerably reduced. High efficiency can be obtained for high-voltage high-power charging applications. The operation principle of the converter is analyzed and verified on a 700-kHz, 3.7-kW prototype, with which a power density of 72 W/inch3 is achieved.

  • 2007

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    This paper investigates low-frequency beat and harmonics in grid-connected three-level pulsewidth-modulated (PWM) voltage-source converters with low switching frequencies. The impact of switching frequencies and switching sequence, as well as mitigation techniques, are studied. Different from some recent results, the analysis confirms the advantages of selecting switching frequency, as an odd-triplen multiple of the grid operating frequency, for eliminating imbalance and undesirable even-order harmonics, which can negatively impact the dc-link neutral-point balance in a three-level converter. Tests and analysis show that low-frequency subharmonic beat can occur in a carrier-based PWM converter when the switching frequency is low and is an imperfect multiple of the grid frequency. Recognizing the beat as interaction of the switching sequence and switching frequency, mitigation techniques to reduce the beat and associated harmonics are investigated and verified through experiments. A simple displacement of switching frequency from the odd-triplen multiple of the grid frequency can effectively suppress the beat with an asynchronous PWM scheme.

Conference Papers
Title
Year
  • Ruirui Chen; Fred Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin B. Choi
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    In paralleled three-phase three-level voltage source inverters, sometimes the currents of paralleled inverters need to be separately adjusted to control power sharing, and the reference vectors will differ in phase and amplitude. In other cases, although the current references of the paralleled inverters are set to be the same, the d-axis and q-axis current closed-loop control outputs of each converter cannot be exactly the same due to the asymmetry in hardware or software. As a result, the reference vector of each inverter may also be different in terms of phase and amplitude. When conventional three-level space vector pulse width modulation (SVPWM) is applied, periodical jump can be observed in the phase current of each inverter and the zero sequence circulating current (ZSCC). This paper investigates the current jump phenomenon in paralleled three-level inverters with space vector modulation (SVM). The mechanism that causes the current jump is illustrated. A modulation method to eliminate this current jump is proposed. Simulation and experimental results are presented to verify the effectiveness of the proposed method and conducted analysis.

  • Ruirui Chen; Fred Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin B. Choi
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    This paper presents the modeling and analysis of zero common-mode voltage (ZCMV) pulse width modulation with dead-time for three-level voltage source inverters. Analytical model to calculate phase output voltage harmonic of three-level inverter with ZCMV modulation is developed. With ZCMV modulation, the common-mode voltage (CMV) of a three-level inverter can be eliminated in theory. However, CMV reduction performance is limited by dead-time in practical applications. Hence, the harmonic characteristics of CMV is modeled and analyzed considering dead-time. Experiments are conducted on a three-level neutral point clamped inverter with ZCMV modulation, and verify the accuracy of developed models.

  • Shuyao Wang; Haiguo Li; Jingxin Wang; Yiwei Ma; Fred Wang; Leon M. Tolbert
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    The residential air-conditioner (A/C) is one of the most widespread load types for a household in the U.S., and it is reported that the malfunction of A/C load influences the performance of the transmission network. However, the lack of accurate modeling of A/C loads limits the effectiveness of evaluating power system dynamic performance and grid stability analysis. A real-time power emulator for an A/C motor using a three-phase voltage source inverter (VSI) is proposed in this paper, which emphasizes the "point-on-wave" characteristics of the A/C load. The proposed VSI based A/C emulator is advantageous since it demonstrates an accurate dynamic performance without sacrificing the computational resources and simulation time. The experimental results verify the accuracy of the A/C load emulator. Furthermore, the fault-induced delayed voltage recovery (FIDVR) events are emulated and analyzed in a multiconverter based hardware test bed (HTB) by using the proposed A/C load emulator. In addition, experiments emulating the dynamic response of the A/C load driven by the power electronics (PE) interface is also performed in the HTB, verifying that the application of PE-interface-driven A/C motor can contribute to alleviating the FIDVR event.

  • Shiqi Ji; James Palmer; Xingxuan Huang; Dingrui Li; Bill Giewont; Leon M. Tolbert; Fred Wang
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    Medium voltage (MV) power converters using high voltage (HV) Silicon Carbide (SiC) power semiconductors result in great benefits in weight, size, efficiency and control bandwidth. However, HV SiC MOSFET based converters suffer from high dv/dt (>100 V/ns). Under high dv/dt environment, sensors are easily interfered due to the power electronic device’s fast switching. In this paper, the noise coupling mechanism in a submodule (SM) voltage sensor is analyzed, and the impact of SM voltage sensor noise on MMC phase-leg operation is discussed. A simulation model and a 10 kV SiC MOSFET based MMC prototype with 25 kV dc-link are built to validate the analysis of the impact.

  • James Palmer; Shiqi Ji; Xingxuan Huang; Li Zhang; William Giewont; Fei Fred Wang; Leon M. Tolbert
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    This work focuses on improving voltage sensor noise immunity in a high voltage and high dv/dt environment. This is demonstrated in a 10 kV SiC MOSFET based Modular Multilevel Converter phase leg. The design is improved through several iterations while employing methodologies such as shielding, PCB layout techniques, improving the signal-to-noise ratio, and reducing the bandwidth of the sensor to reduce the noise impact of the high dv/dt of the SiC device. The impact of each methodology on the design is stressed, and the final version of the sensor shows significant improvement in noise immunity while offering the best high voltage design available.

  • Le Kong; Shuyao Wang; Nattapat Praisuwanna; Fred Wang; Leon M. Tolbert
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    In a modular multilevel converter (MMC) working as a rectifier, digital controllers are widely adopted and usually have three control loops: an inner ac current loop, an outer dc voltage loop, and a circulating current suppression loop. The main design constraint on these control loops is the control delay, which may cause system instability. A few previous papers have analyzed this issue, but only MMC inverter with circulating current proportional integral (PI) control was investigated. In this paper, the generation mechanism of control delay in each control loop of an MMC rectifier is analyzed. Small-signal loop gain models for all the three loops are developed. Based on the control loop models, design cases are examined, and a delay compensation scheme is implemented as an example. Both simulations and experiments validate the effectiveness of the analytical models.

  • Xingxuan Huang; Shiqi Ji; James Palmer; Li Zhang; Dingrui Li; Fred Wang; Leon M. Tolbert; William Giewont
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    This paper focuses on a robust 10 kV SiC MOSFET gate driver with an improved desaturation protection scheme for overcurrent protection. The gate driver is designed for 10 kV/20 A SiC MOSFETs in a modular multilevel converter (MMC) submodule. The gate driver has short circuit protection, status feedback in every switching cycle, dead time insertion, and undervoltage lockout (UVLO) function to support robust continuous operation of the MOSFET and converter. Practical design considerations are elaborated to achieve these functions. With a digital blanking time of 600 ns, the improved desat protection achieves a response time of <350 ns under hard switching fault (HSF), and a response time of <200 ns under fault under load (FUL) and flashover fault. All functions of the gate driver are fully validated in a MMC submodule with a rated dc-link voltage of 6.5 kV.

  • Dingrui Li; Shiqi Ji; Xingxuan Huang; James Palmer; Fred Wang; Leon M. Tolbert
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    Asynchronous microgrid with PCS converter is a new microgrid concept with potentially better performance compared to conventional microgrid. In this paper, a PCS converter controller is designed and tested fully considering different grid requirements including different microgrid operation modes as well as normal and fault grid conditions. The controller architecture and functions are presented. The developed controller is tested on a scaled converter-based hardware test-bed.

  • Liang Qiao; Fred Wang; Jacob Dyer; Zheyu Zhang
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    Junction temperature is one of the most critical indicators not only for the converter design and operation but also for power devices’ reliability. Online monitoring of junction temperature can provide useful information for converter control, protection, and maintenance. In this paper, an intelligent gate driver with online Tj monitoring capability is developed for SiC MOSFETs. The turn-on delay time is selected as the thermal sensitive electrical parameter (TSEP) for online Tj estimation. Moreover, a gate resistance regulation unit is implemented with 10 times sensitivity improvement to increase the measurement accuracy. Then, an edge-detection-based online turn-on delay time measurement with 200 ps resolution is designed and integrated into the gate driver. In the end, a double pulse test (DPT) platform is applied to collect the calibration curves offline. A SiC-based half-bridge inverter is also built to demonstrate the functionality and performance of the online junction temperature monitoring system. Resultantly, this intelligent gate driver can accurately estimate devices junction temperature during inverter operation.

  • Ren Ren; Zhou Dong; Bo Liu; Fred Wang
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    To reduce the volume and weight of differential-mode (DM) inductors, the leakage inductance of a toroidal common-mode (CM) choke is ofen used as partial DM inductance. However, the accurate prediction of the leakage inductance of CM chokes through an analytical model is difficult, making the determination of remaining DM inductance difficult. This paper proposes a modeling method with the analogy between reluctances (or magnetic fields) and capacitances (or capacitive fields). The proposed method is verified by the leakage inductance comparison between the proposed model and simulation results for two CM cores with different turns numbers and wire gauges, and it demonstrated the proposed model can achieve the errors within 15% compared with simulation results for all cases.

  • Ren Ren; Zhou Dong; Bo Liu; Fred Wang
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    Due to the high saturation flux density and the high initial permeability, toroidal nanocrystalline cores are widely applied in the common-mode (CM) inductor design for high power applications. Compared with the flat permeability curve of ferrite cores up to several MHz, the permeability of nanocrystalline cores with a high initial value drops at only around 100 kHz. In addition, the imaginary permeability of nanocrystalline can provide a considerable impedance to achieve the noise attenuation compared with ferrite, being neglected in the inductance-oriented design approach. To achieve a more accurate design result, the paper proposes an impedance-based design approach with considering both frequency-dependent and imaginary permeability of nanocrystalline cores. The required impedance of a CM inductor is derived by the equivalent circuits at a specific frequency. Then, with the frequency-dependent permeability model, the turns number can be calculated by providing enough impedance using both the inductance produced by the real permeability and the resistance produced by the imaginary permeability. After sweeping the frequencies from 150 kHz to 2 MHz in the EMI range, the final turns number will be determined. The proposed design approach is validated with noise measuring in a 10 kW ANPC converter.

  • Wen Zhang; Fred Wang; Bernhard Holzinger
    2020 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2020

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    A programmable device driver platform capable of driving most power semiconductor devices and adapting to both voltage source and current source driving schemes is demonstrated here. It enables driving most power electronics devices, including Si IGBT, SiC MOSFET, SiC BJT and GaN HFET. Two-level or multi-level voltage source driving as well as current source driving are also demonstrated to showcase its capability. The programmable driver platform allows user to quickly drive devices and evaluate their performance in dynamic characterization. It also provides a tool for users to quickly optimize their gate driving performance in power electronics converters.

  • Paige Williford; Fred Wang; Sandeep Bala; Jing Xu
    2019 IEEE 7th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)
    2019

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    The short-circuit robustness of 600 V/30 A GaN gate injection transistors (GITs) was evaluated under various operating conditions to determine the worst-case short-circuit scenario. Although a decrease in maximum short-circuit current was observed with higher bus voltage, the short-circuit withstand time decreases dramatically. At room temperature and a bus voltage of 500 V, the short-circuit withstand time is as short as 160 ns as opposed to 220 ns at 400 V. The withstand time also depends on the maximum short-circuit current and can be extended significantly by reducing the drain current during a short-circuit event. The devices were shown to withstand a short-circuit event for considerably longer period with an elevated initial junction temperature as a result of lower drain current. With short-circuit current reduced from 110 A to 70 A, the withstand time was increased from 215 ns at 25°C to over 10 μs at 150°C and Vdc= 400 V. A gate-sensing protection scheme for GaN GIT was evaluated over various operating conditions and shown to successfully protect devices in less than 150 ns after short-circuit condition up to Tj = 150°C and Vdc= 500 V.

  • Wen Zhang; Fred Wang; Zheyu Zhang; and Bernhard Holzinger
    2019 10th International Conference on Power Electronics and ECCE Asia (ICPE 2019 - ECCE Asia)
    2019

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    A fast and reliable overcurrent protection scheme is crucial for the converter reliability. It is also critical for double pulse test stations where newer devices or even engineering samples are tested, and device failures can be costly. A fast overcurrent protection scheme using the direct current measurement in the double pulse test is demonstrated and 7.55 ns fault response delay time is achieved. The total fault clearing time is determined by the fault signal propagation and device switching speed. Around 100 ns and 60 ns fault clearing time is achieved for SiC and GaN devices, respectively. The much faster protection can potentially simplify the gate driver design and reduce the energy rating of the coaxial shunt resistor. Since the overcurrent detection is directly attached to the current measurement, its impact on the measurement bandwidth is also discussed.

  • Bo Liu; Ren Ren; Fred Wang; Daniel Costinett; Zheyu Zhang
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    In this paper, a variable frequency soft-switching control for a three-level half bridge (TLHB) buck converter is proposed to achieve wide-range output battery charging function without losing zero voltage switching (ZVS) or high efficiency. The adopted variable frequency triangle-current-modulation (TCM) is based on dc measurement and average-model calculation, thus able to realize ZVS operation fully digitally without current zero-crossing-detection (ZCD) circuits. A top-level average current or output voltage feedback controller further ensures the desired power or output voltage regulation. Experimental results from a GaN based TLHB prototype have shown the reliable TCM control and smooth transition of ZVS operation through the charging procedure.

  • Handong Gui; Ruirui Chen; Ren Ren; Jiahao Niu; Fred Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin J. Blalock; Benjamin B. Choi
    2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL)
    2019

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    An analytical model for the device drain-source turn-on overvoltage in three-level active neutral point clamped (3L-ANPC) converters is established in this paper. Considering the two commutation loops in the converter, the relationship between the turn-on overvoltage and the loop inductances is evaluated. The line switching frequency device usually exhibits higher overvoltage, while the high switching frequency device is not strongly influenced by the multiple loops. A 500 kVA 3L-ANPC converter using SiC MOSFETs is tested, and the model is verified with the experimental results.

  • Jiahao Niu; Ruirui Chen; Zheyu Zhang; Handong Gui; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    In paralleled voltage source inverters (VSI), circulating current has both high frequency and low frequency components, and its spectrum highly depends on the modulation scheme. Previous research has mostly focused on the circulating current suppression for paralleled two-level VSIs. Little literature exists on similar analysis for paralleled three-level VSIs using space vector modulation. A detailed circulating current spectrum on full frequency range has not been well developed. This paper presents an improved analytical model for three-level space vector modulation (SVM), considering the impacts of regularly sampled reference and dead time. Then, circulating harmonic currents are determined across the full frequency range for various interleaving angles of two three-level ANPC inverters. The calculated harmonics are also verified by experimental results.

  • Handong Gui; Zheyu Zhang; Ruirui Chen; Jiahao Niu; Leon M. Tolbert; Fred Wang; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    With conventional voltage source gate drives (VSG), the switching speed of SiC MOSFETs is difficult to increase due to large internal gate resistance, high Miller voltage, and limited gate voltage rating. This paper analyzes the requirement of current source gate drive (CSG) for SiC MOSFETs and proposes a CSG that can improve the switching speed and reduce switching loss. With the introduction of bi-directional switches, the influence of the large internal gate resistance of the SiC MOSFET can be mitigated, and sufficient gate current can be guaranteed throughout the switching transient. Therefore, the switching time and loss is reduced. The CSG can be controlled to be a VSG during steady state so the current of the gate drive is discontinuous and the stored energy of the inductor can be returned to the power supply to reduce gate drive loss. Double pulse tests are conducted for a SiC MOSFET with both conventional VSG and the proposed CSG. Testing results show that the switching loss of the proposed CSG is less than one third of the conventional VSG at full load condition.

  • Fred Wang; Ruirui Chen; Handong Gui; Jiahao Niu; Leon Tolbert; Daniel Costinett; Benjamin Blalock; Shengyi Liu; John Hull; John Williams; Timothy Messer; Eugene Solodovnik; Darren Paschedag; Vyacheslav Khozikov; Christopher Severns; Benjamin Choi
    2019 AIAA/IEEE Electric Aircraft Technologies Symposium (EATS)
    2019

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    High power inverters will be a key enabler for future aircraft based on hybrid electric or turbo-electric propulsion as envisioned by NASA and Boeing. Cooling a power electronics converter to low temperature, e.g. using cryogenic cooling, can significantly improve the efficiency and power density of a power conversion system. This paper presents the design of a MW cryogenically-cooled power inverter for electric aircraft applications. The power semiconductor and magnetic component characterization, inverter topology and power stage design, modulation and control, EMI noise reduction and filters design, and cooling system design are illustrated. A MW-level inverter prototype has been assembled and tested. The experimental results verify the functionality of the inverter.

  • Jiahao Niu; Ruirui Chen; Zheyu Zhang; Handong Gui; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    Paralleling power electronics inverters is an effective way to increase dc-ac system power level. Accurately synchronized switching action and independent closed-loop regulator are necessary to prevent circulating current in paralleled inverters. There are many challenges for the controller design, when the number of paralleled inverters is large, and control period gets short for high switching frequency applications. This paper presents a single controller design based on DSP + FPGA that is suitable for paralleling multiple inverters. A simple synchronization scheme between DSP and FPGA based on universal parallel port (UPP) is proposed to eliminate the synchronization delay among inverters, and independent control of each converter can also be implemented. The controller is built for a system consisting of 4 paralleled three-level, three-phase high frequency ANPC inverters using space vector modulation, and it can be easily adopted to other topologies and modulations. Experimental results have demonstrated the effectiveness of this controller.

  • Handong Gui; Ruirui Chen; Jiahao Niu; Zheyu Zhang; Fred Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin J. Blalock; Benjamin B. Choi
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    The adoption of SiC devices in high power applications enables higher switching speed, which requires lower circuit parasitic inductance to reduce the voltage overshoot. This paper presents the design of a busbar for a 500 kVA three-level active neutral point clamped (ANPC) converter. The layout of the busbar is discussed in detail based on the analysis of the multiple commutation loops, magnetic canceling effect, and DC-link capacitor placement. The loop inductance of the busbar is verified with simulation, impedance measurements, and converter experiments. The results match with each other, and the inductances of small and large loop are 6.5 nH and 17.5 nH respectively, which is significantly lower than the busbars of NPC type converters in other references.

  • Ruirui Chen; Jiahao Niu; Handong Gui; Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    The four-leg topology has been applied to two-level inverters for common-mode (CM) noise elimination. To achieve zero common-mode voltage (CMV), the zero vector typically used in the two-level inverter is not allowed. As a result, the reference cannot be synthesized by nearest three vectors, which introduces a penalty in dc voltage utilization and current THD. This paper applies the fourth-leg to three-level neutral point clamped (NPC) inverter fed motor drives. Unlike the case in the two-level inverter, the reference can be synthesized by the nearest three vectors while zero CMV can be achieved at the same time in a three-level inverter with the fourth-leg. The topology and modulation are presented. The fourth-leg filter structures are investigated, and a fourth-leg filter structure which decouples the fourth-leg from the main circuit power level is proposed for high power applications. The experiment results on a three-level NPC inverter show that with the fourth-leg and presented modulation applied, the CM noise has been significantly reduced, and around 25 dB attenuation can be observed at the first noise peak in the electromagnetic interference (EMI) frequency range.

  • Ruirui Chen; Jiahao Niu; Handong Gui; Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    This paper presents a comprehensive analytical analysis of the ac and dc side harmonics of the three-level active neutral point clamped (ANPC) inverter with space vector modulation (SVM) scheme. An analytical model to calculate the harmonics of a three-level converter with SVM is developed. The ac side output voltage harmonics and dc side current harmonics characteristics are calculated and analyzed. With the developed models, the impact of interleaving on both sides harmonics are studied which considers the modulation index, interleaving angle, and power factor. The analysis provides guideline for interleaving angle optimization to reduce the ac side power filter and dc side dc-link capacitor. The relationship between electromagnetic interference (EMI) filter corner frequency and switching frequency is also analytically derived which provides guideline for switching frequency and EMI filter design optimization. Two paralleled three-level ANPC inverters are constructed and experimental results are presented to verify the analytical analysis.

  • Handong Gui; Zheyu Zhang; Ruirui Chen; Ren Ren; Jiahao Niu; Bo Liu; Haiguo Li; Zhou Dong; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    With the development of wide band-gap (WBG) technology, the switching speed of power semiconductor devices increases, which makes circuits more sensitive to parasitics. For three-level active neutral point clamped (3L-ANPC) converters, the over-voltage caused by additional non-active switch loop can be an issue. This paper analyzes the multiple commutation loops in 3L-ANPC converter and summarizes the impact factors of the device over-voltage. The nonlinearity of the output capacitance of the device can significantly influence the over-voltage. A simple control without introducing additional hardware circuit or complex software algorithm is proposed to attenuate the effect of the nonlinear output capacitance. Multi-pulse test is conducted for a 3L-ANPC converter built with silicon carbide (SiC) MOSFETs. With the proposed control, the testing results show that the peak drain-source voltage of both active and non-active switches is reduced by more than 20% compared to the conventional control.

  • Ruirui Chen; Jiahao Niu; Handong Gui; Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    This paper presents the coupled inductor design for interleaved three-level active neutral point clamped (ANPC) inverter considering electromagnetic interference (EMI) noise reduction. Compared to two-level case, the scenarios involved in the three-level space vector modulation (SVM) are more complicated when analyzing the volt-seconds of the coupled inductor for paralleled three-level inverter. At system level, the purpose of converter interleaving is to reduce EMI noise and ripple current in most applications, and coupled inductor design should consider the needs of EMI noise reduction and EMI filter design. These issues are discussed in this paper. The relationship between circulating current and EMI noise is illustrated. EMI filter corner frequency as a function of interleaving angle is analytically derived, and optimal interleaving angle for maximum common-mode (CM) filter and differential-mode (DM) filter corner frequencies is discussed. Coupled inductor design methodology for interleaved three-level inverters with SVM is then presented. Experiments on two interleaved ANPC inverters are conducted. The results verify the coupled inductor design. With the derived optimal interleaving angle, the CM and DM EMI noise are significantly reduced.

  • Ruirui Chen; Jiahao Niu; Handong Gui; Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    This paper presents harmonic analysis of common-mode reduction (CMR) modulation for three-level voltage source inverters. The analytical model to calculate the harmonics of CMR modulation with arbitrary PWM sequence is developed. The impact of alternative PWM sequences of CMR modulation on harmonics is investigated. New three-state and four-state PWM sequences of CMR are proposed which spread the energy centered in the carrier frequency in the conventional CMR, and thus reduce the voltage peaks in frequency domain. Experiments are conducted on a three-level neutral point clamped inverter. Experiment results verify the developed analytical model and harmonic analysis.

  • Le Kong; Shuyao Wang; Nattapat Praisuwanna; Shuoting Zhang; Liang Qiao; Fred Wang; Leon M. Tolbert
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    The modular multilevel converter (MMC) is regarded as a competitive choice for future dc grids at high and medium voltage levels. To study the dc grid stability, a few MMC dc impedance models have been proposed, but their accuracy is limited by the assumption of ideal submodule voltage or neglecting the circulating current control. In this paper, a more accurate MMC dc impedance model is developed considering both the submodule capacitor voltage and circulating current dynamics. Simulation and experiment results indicate that the developed model matches with the actual MMC better than state-of-art models and can predict the dc system stability correctly.

  • Li Zhang; Shiqi Ji; Shida Gu; Xingxuan Huang; James Palmer; William Giewont; Fred Wang; Leon M. Tolbert
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    The performance of the gate drive power supply (GDPS) greatly impacts the safety and reliability of the gate drive for power semiconductor power devices. This paper focuses on the design of isolated gate driver power supply for 10 kV silicon-carbide (SiC) MOSFET for medium-voltage (MV) applications. Different insulation schemes are compared for the high-voltage insulated transformer in GDPS. Impact factors for transformer interwinding capacitance are analyzed, with which, a low inter-winding capacitance design approach is proposed for the high-voltage insulated transformer. Furthermore, an upward-voltage-reference based voltage regulation scheme is proposed for achieving good load regulation without output voltage feedback. Finally, a 20-kV-insulated GDPS is built and tested, and experimental results are presented to verify the effectiveness of the design approach.

  • Li Zhang; Shiqi Ji; Xingxuan Huang; James Palmer; William Giewont; Fred Wang; Leon M. Tolbert
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    The newly emerged 10 kV MOSFETs will be a game changer for the next generation medium-voltage (MV) power converters. While the unique feature of the fast switching speed benefits the development of high efficiency and high power-density MV converters, high dv/dt will be imposed on the power devices and passive components, which will result in accelerated insulation degradation and extreme EMI. This paper investigates the high dv/dt resulting from dead-time insertion in the modular multilevel converter (MMC). For reducing dv/dt, a multiple-step commutation scheme is proposed, in which, the submodules that transfer from bypass-state to insert-state are one-by-one commutated with those transferring from insert-state to bypass-state before the remaining unpaired submodules. Finally, the proposed multiple-step commutation scheme is verified on a single-phase MMC with 10-kV SiC MOSFET.

  • Dingrui Li; Yiwei Ma; Chengwen Zhang; He Yin; Ishita Ray; Yu Su; Lin Zhu; Fred Wang; Leon M. Tolbert
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    To overcome the limitations of digital simulation (numerical oscillation, limited computing capability of processors, etc.), a converter-based hardware test-bed was developed at CURENT for real-time power grid emulation. However, distribution systems especially microgrids cannot be emulated and tested on the existing hardware test-bed. This paper develops a microgrid test-bed based on the existing hardware test-bed to enable controller testing for microgrids with dynamic boundary. The design and realization of the microgrid hardware test-bed are introduced. The experimental results of the microgrid controller tests are also provided.

  • Shiqi Ji; Xingxuan Huang; Li Zhang; James Palmer; William Giewont; Fred Wang; Leon M. Tolbert
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    Medium voltage (MV) power converters using high voltage (HV) Silicon Carbide (SiC) power semiconductors result in great benefits in weight, size, efficiency and control bandwidth. However, challenges still exist on the components design considering HV insulation and noise immunity requirements in the MV SiC based power converter. A 5-level MMC based transformer-less grid-connected dc/ac converter is developed for 13.8 kV medium voltage grid using 10 kV SiC MOSFETs. The key components, including gate driver with high dv/dt immunity and fast reliable protection, isolated power supply with low parasitic capacitance, voltage/current sensors with high noise immunity, and passives following related insulation standard are provided. A 25 kV dc-link phase-leg is demonstrated, and the experimental results are presented.

  • Xingxuan Huang; James Palmer; Shiqi Ji; Li Zhang; Fred Wang; Leon M. Tolbert; William Giewont
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    This paper focuses on the design and testing of a half bridge submodule based on discrete 10 kV/20 A SiC MOSFETs for a modular multilevel converter (MMC). The rated dc bus voltage of the submodule is 6.5 kV, and the MOSFETs switch with dv/dt up to 100 V/ns. Design considerations and challenges for components in the submodule are presented, especially the gate driver to support the robust continuous operation and the submodule voltage sensor. Systematic testing procedures are developed to fully test the submodule up to 6.5 kV. High voltage insulation and high dv/dt are tackled throughout the design and testing. The designed submodule is validated in the continuous switching test at 6.5 kV with dv/dt up to 100 V/ns.

  • Yiwei Ma; Lin Zhu; Fred Wang; Leon M. Tolbert
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    Virtual synchronous generator control provides a potential solution to connect power electronics interfaced sources to the power system. With its flexible control, the emulated inertia may be adaptively changed to enhance system small-signal stability. However, previously proposed methods may have adverse impact to system transient stability. This paper proposes to improve the methods by using wide-area measurements, namely center of inertia frequency. Experimental results are presented to both demonstrate the limitations of previous control schemes, and the effectiveness of the proposed one. The practical implementation of this method is discussed.

  • James Palmer; Shiqi Ji; Xingxuan Huang; Li Zhang; William Giewont; Fred Fei Wang; Leon M. Tolbert
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    This paper focuses on the testing approach and validation of a 10 kV SiC MOSFET based Modular Multilevel Converter (MMC) phase-leg meant to interface to a 13.8 kV microgrid. Many of the difficulties associated with testing high-voltage SiC converters are shared regardless of topology, thus the testing setup and challenges associated with it are emphasized while the converter is only briefly summarized. Each component is individually verified, and the entire system is tested up to its rated dc link voltage and power, 25 kV and 35 kVA, respectively.

  • Shuying Zhen; Yiwei Ma; Fred Wang; Leon M. Tolbert
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    A microgrid with dynamic boundary can expand or shrink its boundary depending on available local distributed energy resources (DER). Compared to conventional microgrid with fixed boundary, it can lead to better DER utilization and improved reliability. Previous literature has only considered the operation of a microgrid with a single island that is energized by stable voltage sources. This paper introduces control function designs that can effectively synchronize islands inside a dynamic boundary microgrid, depending on the operation status of each voltage source inside the islands. An overview of the components and rationale within the control function designs is provided, and hardware-in-the-loop simulation results are analyzed to demonstrate the effectiveness of the control functions.

  • Zhe Yang; Paige Williford; Edward A Jones; Jianliang Chen; Fred Wang; Sandeep Bala; Jing Xu
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    The paper aims to resolve the converter loss discrepancy between calculation and testing results by considering five factors: impacts of parasitic capacitance on switching loss, parameter variation of devices, time-varying power dissipation and junction temperature, thermal modeling using Finite Element Analysis, and some practical issues of the passive components. A 4.5 kW hard-switching inverter prototype using GaN devices was used as an example to demonstrate the improvement of loss model. The results show that after considering the above factors, loss discrepancy reduces from 35.7 W (35%) to 1.4 W (4%) at heavy load and, from 3.9 W (28%) to 2.6 W (less than 16%) at light load.

  • Wenchao Cao; Yiwei Ma; Fred Wang
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    This paper proposes an adaptive control strategy for passivity or phase compensation of inverter output admittance or impedance based on online detection of resonance frequency, so that inverters can be stably integrated into power grids with unknown system information or time-varying structures. The resonance frequency is detected by online fast Fourier transform (FFT) analysis of inverter current within the inverter controller. The passivity of output admittance of current-controlled inverters at the resonance frequency is compensated by emulating a virtual parallel resistor through an additional voltage feed-forward path with a band-pass filter. The phase of output impedance of voltage-controlled inverters at the resonance frequency is compensated by inserting a notch filter in the current feed-forward path. Experimental results validate the effectiveness of the proposed adaptive impedance compensation method in resonance damping and stable integration of inverters into unknown systems.

  • Ren Ren; Bo Liu; Zhou Dong; Fred Wang
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    For medium to high power application, due to the soft saturation and relatively higher saturation flux density, the powder and amorphous cores are commonly chosen for the DM inductors to achieve high power density in the EMI filter design. One of the issues of these materials is their permeability variation with operating current bias. Even for ac application, the three-phase currents at different switching cycles during one line cycle varies greatly, which leads to a variable DM inductance at different time intervals during one line cycle. Since the three-phase system has the unequal instantaneous currents for three phases, current-bias dependent permeability will cause the unbalanced DM inductance/impedance which converts DM noise to CM noise, also called mixed-mode (MM) noise. In this paper, the characteristics of current-bias dependent permeability are investigated for several commonly adopted DM core materials. In addition, a time domain variable inductance model considering current-bias characteristics is developed and applied to evaluate its impacts on the CM noise and the CM filter design. The phenomenon and proposed model are experimentally verified on a 10 kW three-level ANPC converter.

  • Zhou Dong; Ren Ren; Bo Liu; Fred Wang
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    The accurate leakage inductance modeling of common mode chokes (CMCs) can reduce trial-and-error filter debugging efforts and help avoid the saturation issue caused by the leakage flux. However, the analytical leakage inductance model is difficult to derive due to the complex leakage flux distribution. This paper presents a data-driven approach to model the CMC leakage inductance. A large amount of the leakage inductance data is collected by sweeping the selected input variables for the 3D finite element method (FEM) simulation. Then the data is trained by Artificial Neutral Network (ANN) to regress the nonlinear relationship between the leakage inductance and selected input variables. To verify the proposed method, core ZW4310TC is selected to model the relationship between the leakage inductance and winding parameters. Three CMCs with core ZW4310TC were built with different winding parameters and their leakage inductances were measured to verify the model. Compared with a previous analytical model, the error was reduced from 42.9% to 1.3% at the case where the previous model has the worst accuracy.

  • Wen Zhang; Zheyu Zhang; Fred Wang
    2019 IEEE Energy Conversion Congress and Exposition (ECCE)
    2019

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    Coaxial shunt resistors are very useful for measuring the ultra-fast current in wide-bandgap device switching transients. One of their major drawbacks is the relatively large parasitic inductance. The traditional coaxial shunt resistors are reviewed and the relationship between energy rating and parasitic inductance is determined. The parasitic inductance can be greatly reduced with a lower energy rating. A measurement method for characterizing their up to GHz bandwidth is also reported. Lower than expected bandwidth was observed and a fix using measured transfer characteristics is therefore described.

  • Zhe Yang; Harish Suryanarayana; Fred Wang
    2019 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2019

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    This paper proposes a simple and accurate design method for air gapped inductors. Using inductor models with fringing effect, the proposed method systematically evaluates possible combinations of cores, turn numbers, and air gap lengths within the given constraints, including core geometries and magnetic saturation. Design examples show that the proposed method reduces the number of turns as well as the core size compared to the conventional methods. The method features simplicity in both algorithm and calculation since it only requires a small number of iteration loops. Various models involved in inductor design, including inductance, flux density, loss and thermal, can be readily incorporated into the proposed method.

  • Jiahao Niu; Fred Wang
    2019 IEEE 10th International Symposium on Power Electronics for Distributed Generation Systems (PEDG)
    2019

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    Sorting algorithm is required for operating modular multilevel converter (MMC) with nearest level modulation, to keep the unbalanced submodule capacitor voltage within an acceptable range. Several sorting algorithms have been proposed in previous literatures. However, very few papers discussed about how to select the execution frequency of a sorting algorithm. This paper aims to investigate on the impact of the execution frequency in sorting algorithm on the output voltage harmonics, average switching frequency, submodule capacitor voltage fluctuation of an MMC using nearest level modulation. Multiple MMC models with different number of submodules are built in MATLAB/Simulink. Three different types of sorting algorithms are implemented, and evaluated at various execution frequencies as well as different operating points. Conclusions drawn from the extensive simulations show that to select a sorting algorithm and its execution frequency, all three performance criterions should be considered simultaneous and a minimum execution frequency is always required.

  • Zheyu Zhang; Handong Gui; Ren Ren; Fred Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin J. Blalock
    2018 AIAA/IEEE Electric Aircraft Technologies Symposium (EATS)
    2018

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    Wide bandgap (WBG) semiconductor devices and cryogenic cooling are key enablers for highly-efficient ultra-dense power electronics converters, which are critical for future more electric aircraft applications. For the development and optimization of a cryogenically-cooled converter, an understanding of power semiconductor characteristics, especially for emerging WBG devices, is critical. This paper focuses on WBG device characterization at cryogenic temperatures. First, the testing setup for cryogenic temperature characterization is introduced. Then several WBG device candidates (e.g., 1200-V SiC MOSFETs and 650-V GaN HEMTs) are characterized from room to cryogenic temperatures. The test results are presented with trends summarized and analyzed, including on-state resistance, breakdown voltage, and switching performance.

  • Wen Zhang; Zheyu Zhang; Fred Wang; Daniel Costinett; Leon M. Tolbert; Benjamin J. Blalock
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    Switching transient overvoltage is inevitable in hard switching applications, and the faster switching speed of SiC MOSFETs suggests even worse overvoltage. This paper focuses on the turn-on overvoltage. To understand its nature, the switching transient is analyzed, and it shows the turn-on overvoltage is largely independent of load current condition. This phenomenon is verified by characterizing the turn-on overvoltage of a SiC MOFET and a SiC Schottky diode. Finally, a SPICE-based model is also built to understand the switching transient more accurately, and the modeling method can accurately predict the turn-on overvoltage and help select device voltage rating.

  • Jacob Dyer; Zheyu Zhang; Fred Wang; Daniel Costinett; Leon M. Tolbert; Benjamin J. Blalock
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    Dead-time, device output capacitance, and other non-ideal characteristics cause voltage error for the midpoint PWM voltage of the semiconductor phase-leg employed in a voltage-source inverter (VSI). Voltage-second balancing is a well-known concept to mitigate this distortion and improve converter power quality. This paper proposes a unique voltage-second balancing scheme for a SiC based voltage source inverter using online condition monitoring of turn-off delay time and drain-source voltage rise/fall time. This data is sent to the micro-controller to be used in an algorithm to actively adjust the duty cycle of the input PWM gate signals to match the voltage-second of the non-ideal output voltage with an ideal output voltage-second. The monitoring system also allows for this implementation to eliminate the need for precise current sensing and allows for the implementation to be load independent. Dynamic current sensing is still a developing technology, and each load has a unique effect on the output voltage distortion. Test results for a 1 kW half-bridge inverter implementing this monitoring system and voltage-second balancing scheme show a 70% enhancement on the error against the ideal fundamental current value of the output current and a 2% THD improvement on the output current low frequency harmonics.

  • Bo Liu; Edward Jones; Ren Ren; Zheyu Zhang; Fred Wang; Daniel Costinett
    2018 1st Workshop on Wide Bandgap Power Devices and Applications in Asia (WiPDA Asia)
    2018

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    In this paper, an extra junction capacitance and its associated switching commutation path are identified in three-level ac/dc converters, which were previously overlooked due to the off-state of the related device in half line cycle. The impact of this effect on power loss is analyzed, showing an underestimated switching loss in the traditional loss calculation of three-level converters. Through a proposed loss re-evaluation approach based on energy data of conventional double pulse tester (DPT), the corrected loss matches experimental results obtained from a 450kHz 650 V Gallium Nitride (GaN) based Vienna-type rectifier, showing 17.4% additional switching loss due to this effect. And the dominant extra switching loss is found to be Coss loss instead of overlap loss in WBG converters. Thefore, the effect is severe in high swtiching frequency high-speed wideband gap (WBG) based three-level converters.

  • Bo Liu; Ren Ren; Zheyu Zhang; Fred Wang; Daniel Costinett
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    As wide bandgap (WBG) semiconductors are gradually adopted for high switching frequency high power-density power converter, new challenges arise from control to hardware design. In this paper, an improved input current sampling method is proposed for three-phase rectifiers to avoid sampling noises when rectifiers are operated at high speed and high switching frequency. Experimental results obtained from a 450-kHz enhancement-mode Gallium Nitride (GaN) high-electron-mobility transistor (HEMT) based three-phase three-level Vienna-type rectifier demonstrate the good performance of the sampling method.

  • Yutian Cui; Leon M. Tolbert; Daniel J. Costinett; Fred Wang; Benjamin J. Blalock
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    Data centers consume an ever-increasing amount of electricity because of the rapid growth of cloud computing and digital information storage. A high voltage point of load (HV POL) converter is proposed to convert the 400-VDC distribution voltage to 1-VDC within a single stage to increase the power conversion efficiency. A six-phase input series output parallel (ISOP) connected structure is implemented for the HV POL. The symmetrical controlled half bridge current doubler is selected as the converter topology in the ISOP structure. The full load efficiency is improved by 4% points compared with state of the art products. A voltage compensator has been designed in order to meet the strict dynamic voltage regulation requirement. A laboratory prototype has been built, and experimental results have been provided to verify the proposed HV POL with a single power conversion stage can meet the dynamic voltage regulation requirement for an on-board power supply with higher efficiency compared to the conventional architecture.

  • Handong Gui; Zheyu Zhang; Ren Ren; Ruirui Chen; Jiahao Niu; Leon M. Tolbert; Fred Wang; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    Although SiC MOSFETs show superior switching performance compared to Si IGBTs, it is unknown whether SiC MOSFETs have the same advantage over Si super junction (SJ) MOSFETs such as CoolMOS. This paper analyzes the switching performance in different switching cell configurations and summarizes the impact factors that influence switching loss. A double pulse test is conducted for a SiC MOSFET and a CoolMOS with the same voltage and current rating. In the FET/diode cell structure, a SiC Schottky diode is used as the upper device to eliminate the reverse recovery, and the testing results show that the SiC MOSFET has 2.4 times higher switching loss than the Si CoolMOS. This can be explained by the smaller transconductance and the higher Miller voltage of the SiC MOSFET. On the other hand, the Si CooMOS has 10 times higher switching loss than the SiC MOSFET in the FET/FET cell structure because of the significant turn-on loss caused by the poor reverse recovery of its body diode.

  • Zheyu Zhang; Handong Gui; Jiahao Niu; Ruirui Chen; Fred Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin J. Blalock
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    Due to the low availability, high cost, and limited performance of high voltage power devices in high voltage high power applications, series-connection of low voltage switches is commonly considered. Practically, because of the dynamic voltage unbalance and the resultant reliability issue, switches in series-connection are not popular, especially for fast switching field-effect transistors such as silicon (Si) super junction MOSFETs, silicon carbide (SiC) JFETs, SiC MOSFETs, and gallium nitride (GaN) HEMTs, since their switching performance is highly sensitive to gate control, circuit parasitics, and device parameters. In the end, slight mismatch can introduce severe unbalanced voltage. This paper proposes an active voltage balancing scheme, including 1) tunable gate signal timing unit between series-connected switches with <; 1 ns precision resolution by utilizing a high resolution pulse-width modulator (HRPWM) which has existed in micro-controllers; and 2) online voltage unbalance monitor unit integrated with the gate drive as the feedback. Based on the latest generation 600-V Si CoolMOS, experimental results show that the dynamic voltage can be automatically well balanced in a wide range of operating conditions, and more importantly, the proposed scheme has no penalty for high-speed switching.

  • Ruirui Chen; Zheyu Zhang; Ren Ren; Jiahao Niu; Handong Gui; Fred Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin J. Blalock
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    Understanding the CM inductor core saturation mechanism and reducing core flux density is critical for CM inductor design optimization. Instead of a time domain method, this paper introduces frequency domain spectrum concept for CM inductor core saturation analysis and design optimization, which will provide designers a better understanding of CM inductor design. First, both core permeability and converter modulation index's opposite influence on DM flux density and CM flux density are identified. Then, CM flux density is further investigated based on the spectrum concept. Three components in the CM inductor which may cause large CM flux density and core saturation are summarized: (1) switching frequency related components, (2) impedance resonance frequency related components, and (3) modulation frequency related components. Each component is investigated for CM flux density reduction and filter design optimization. A connecting AC and DC side midpoint with notch filter structure is proposed to reduce modulation frequency related components. Experiment results are presented to verify the proposed concept and method.

  • Bo Liu; Ren Ren; Fred Wang; Daniel J. Costinett; Zheyu Zhang; Yiwei Ma
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    Attenuation performance of an EMI filter can be significantly degraded by coupling, parasitics, and frequency-dependent nonlinearity of magnetic cores. In this paper, the effect due to mutual capacitive coupling in filter structures with T-shape joint is identified and investigated. Its mechanism indicates that this coupling is the dominant cause of performance degradation in T-shape filters. PCB slits and grounded shielding are proposed as two effective mitigation solutions, respectively, and are further combined to improve filter transfer gain up to 40 dB along the high frequency range. Experimental results obtained from a three-phase LCL common-mode (CM) filter verify the significant impact of this coupling and the effectiveness of the proposed mitigation methods.

  • Ruirui Chen; Zhou Dong; Zheyu Zhang; Handong Gui; Jiahao Niu; Ren Ren; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    Superconducting technologies such as motors together with the supporting cryogenic power electronic system are growing in importance in aircraft applications. It is critical to understand the influence of low temperature on filters of the power converter system in these applications. Also, it is worthwhile to investigate whether the converter system can achieve higher efficiency and high power density by utilizing the provided low temperature cooling environment. This paper conducted a comprehensive magnetic core characterization at low temperature to understand the core properties and support filter design at low temperature. The ferrite and nanocrystalline material are characterized from room temperature to cryogenic temperature in a wide range of operating frequencies. The results show that the permeability of ferrite material decreases by a factor of 7~8 and the core loss increases more than 10 times when operating at very low temperature. The permeability of nanocrystalline material decreases to 60% and the core loss increases 1.5~2.5 times when operating at very low temperature. The saturation flux density of both materials has slight increase at low temperature. Based on tested data, a case study of inductor design considering the low temperature cooling environment is presented to illustrate the influence of low temperature on inductor design.

  • Handong Gui; Ren Ren; Zheyu Zhang; Ruirui Chen; Jiahao Niu; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    To operate a converter at cryogenic temperatures, understanding the characteristics of power semiconductor devices is critical. This paper presents the characterization of state-of-the-art 1.2 kV SiC MOSFETs from leading manufacturers at cryogenic temperatures. The testing setup consisting of a cryogenic chamber, and a liquid nitrogen Dewar is introduced. With a curve tracer and double pulse test, comprehensive characterization of the SiC MOSFETs including both static and switching performance is conducted and evaluated. Test results indicate the on-resistance increases while the breakdown voltage remains relatively constant at cryogenic temperatures. Other characteristics like threshold voltage and switching loss vary significantly at cryogenic temperatures among devices from different manufacturers.

  • Ruirui Chen; Jiahao Niu; Zheyu Zhang; Handong Gui; Ren Ren; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    Zero sequence circulating current (ZSCC) exists when paralleled inverters have common dc and ac sides without isolation. Most of the prior work on the ZSCC analysis and suppression depended on paralleled two-level inverters. The scenarios involved in the three-level converters are more complicated. This paper investigates the ZSCC in paralleled three-level active neutral point clamped (ANPC) inverters. The mechanisms causing potential ZSCC jump in three-level paralleled ANPC inverters are analyzed. The ZSCC patterns of different interleaved modulation schemes for three-level converters are illustrated. Then, the active vector dividing concept is extended to three-level converters, and a modulation scheme is proposed to reduce the high frequency ZSCC in three-level converters. Experiments have been conducted on two paralleled three-level inverters. The current jump in ZSCC is observed and mitigated. The ZSCC with proposed modulation scheme is reduced to less than half of the ZSCC with conventional continuous space vector modulation (CSVM) scheme.

  • Ruirui Chen; Zheyu Zhang; Ren Ren; Jiahao Niu; Handong Gui; Fred Wang; Leon M. Tolbert; Daniel J. Costinett; Benjamin J. Blalock
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    Unlike conventional passive or active filters, an impedance balancing circuit reduces the common-mode (CM) electromagnetic interference (EMI) noise by establishing an impedance balancing bridge. The EMI noise can be significantly reduced when the impedance bridge is designed to be well balanced. This paper investigates impedance balancing circuits in Dc-fed motor drive systems where both DC input and AC output need to meet EMI standards and thus EMI filters are needed for both sides. An impedance balancing circuit is proposed to reduce both DC and AC side CM noise. Two auxiliary branches are added to the conventional passive filters to establish an impedance bridge and reduce CM noise. The design criteria are presented, and the impact of the proposed impedance balancing circuit on both sides CM noise are investigated. It shows that the proposed impedance balancing circuit can reduce DC side and AC side CM noise based on different mechanisms. The CM noise reduction performance of the proposed method does not depend on the motor and cable models. Experiment results are presented to demonstrate the feasibility and effectiveness of the proposed method.

  • Ren Ren; Zheyu Zhang; Bo Liu; Ruirui Chen; Handong Gui; Jiahao Niu; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    One of the popular converter topologies applied in high power dc-ac applications is the three-level active neutral point clamped (ANPC). Owing to relatively low switching frequency and slow switching speed of these topologies in high power applications, the commutation loop analysis in these topologies has not been fully conducted, and the over-voltage issue of non-active switches has not been thoroughly analyzed. This paper reveals an over-voltage issue on non-active switches in three level inverters due to multi-commutation loop. The detailed mode analysis during the commutation and related over-voltage issue are given. Finally, Si-based ANPC with 140 kHz switching frequency and SiC-based ANPC converters with 280 kHz switching frequency and high switching speed are tested respectively to compare and verify the over-voltage issue for non-active switches.

  • Ren Ren; Handong Gui; Zheyu Zhang; Ruirui Chen; Jiahao Niu; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett; Benjamin B. Choi
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    In order to evaluate the feasibility of newly developed GaN devices in a cryogenic-cooled converter, this paper characterizes a 650 V enhancement-mode Gallium-Nitride heterojunction field-effect transistor (GaN HFET) at cryogenic temperatures. The characterization includes two parts: static and dynamic characterization. The results show that this GaN HEMT is an excellent device candidate to be applied in cryogenic-cooled applications. For example, transconductance at cryogenic temperature is 2.5 times of one at room temperature, and accordingly, peak di/dt during turn-on transients at cryogenic temperature is around 2 times of that at room temperature. Moreover, the on-resistance of the channel at cryogenic temperature is only one-fifth of that at room temperature.

  • Shuoting Zhang; Jingxin Wang; Fred Wang; Leon M. Tolbert
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    A power converter based transmission line emulator has been developed for the hardware test-bed (HTB) platform, which emulates power systems by mimicking the system components with universal three-phase voltage source converters. In power grids, transmission line series compensation devices are utilized to enhance the power delivery capability and controllability by regulating the equivalent impedance of a transmission line. This paper proposes a method of mimicking variable capacitors and inductors to combine the series compensation device emulation into the transmission line emulator so that various power system scenarios can be studied. Simulation and experiment results verify the effectiveness of the transmission line emulation with integrated series compensation devices.

  • Yiwei Ma; Xiaotong Hu; He Yin; Lin Zhu; Yu Su; Fred Wang; Leon M. Tolbert; Yilu Liu
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    To better utilize the existing electric power grid distribution network automation of smart switches, a microgrid can expand or shrink its electrical boundary according to available renewable generation. Previous literature only focused on the design of a microgrid with a dynamic boundary, but without considering real-time operation. This paper proposes a microgrid controller that enables operation of microgrid with dynamic boundary and can be integrated into the existing distribution automation system. The architecture of the control system is introduced, and the essential functions such as online topology assessment and synchronization are presented. Simulation results are given to demonstrate the feasibility of the proposed controller.

  • Shiqi Ji; Marko Laitinen; Xingxuan Huang; Jingjing Sun; Bill Giewont; Leon M. Tolbert; Fred Wang
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    The short circuit performance of a 3rd generation 10 kV/20 A SiC MOSFET with short channel is characterized in this paper. The platform consisting of a phase-leg configuration, which can test both hard switching fault (HSF) and fault under load (FUL) types of fault, is introduced in detail. A Si IGBT based solid state circuit breaker is developed for short circuit test. The short circuit protection having a response time of 1.5 μs is validated by the test platform. The short circuit characteristics for both the HSF and FUL types at 6 kV DC-link are presented and analyzed.

  • Shuoting Zhang; Shuyao Wang; Nattapat Praisuwanna; Le Kong; Yalong Li; Robert B. Martin; Fred Wang; Leon M. Tolbert
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    Modular multilevel converters (MMCs) have been widely adopted for high voltage direct current (HVDC) applications and have been targeted for use in future dc grids as well. However, most of the MMC research is still limited to digital simulations or relied on hardware demonstrations with a specific setup and limited number of submodules (SMs). In this paper, a MMC test-bed with 10 SMs in each arm is developed that has flexible reconfiguration of the MMC topologies, switching frequencies, and passive element parameters. The MMC test-bed hardware construction, control scheme, and communication architecture are described, and typical MMC scenarios are conducted to verify its multiple functions.

  • Xingxuan Huang; Shiqi Ji; James Palmer; Li Zhang; Leon M. Tolbert; Fred Wang
    2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)
    2018

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    In a converter based on 10 kV SiC MOSFETs, major sources of parasitic capacitance are the anti-parallel junction barrier schottky (JBS) diode, heat sink, and load inductor. A half bridge phase leg test setup is built to investigate these parasitic capacitors' impact on the switching performance at 6.25 kV. Generally these parasitic capacitors slows down both turn-on and turn-off transient and can cause significant increase in switching energy loss. The impact of the parasitic capacitor in the load inductor is analyzed, which has either very short wire or long wire in series. Switching performance of the phase leg with two different thermal designs are compared to investigate the impact of the parasitic capacitor due to the heat sink. The large parasitic capacitor due to the large drain plate of discrete 10 kV SiC MOSFET for heat dissipation can result in 44.5% increase in switching energy loss at low load current.

  • Jiaojiao Dong; Lin Zhu; Yilu Liu; D. Tom Rizy; Fei Fred Wang; Leon M. Tolbert; Jim Glass
    2018 Australasian Universities Power Engineering Conference (AUPEC)
    2018

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    Practical distribution system contains many nodes and short branches. As a result, a more efficient and stable distribution state estimation (DSE) algorithm is needed to properly handle the inverse operation of its large-scale ill-conditioned information matrix. This paper proposed a two-stage DSE algorithm to transform the inverse operation into addition and multiplication operations in a recursive manner. It includes pseudo measurement preprocessing in the offline stage where an approximate linear estimator is adopted to relieve most of computation burdens, and real-time correction in the online stage where a nonlinear estimator is used to update the estimation. Numerical results of the method applied to both IEEE standard test systems and an actual distribution system show the accuracy and effectiveness of the proposed algorithm.

  • Shuyao Wang; Shuoting Zhang; Yiwei Ma; Fred Wang; Leon M. Tolbert
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    The frequency decoupling effect of the voltage source converter (VSC)-based high voltage dc (HVDC) transmission makes frequency support unavailable between two ac subsystems interconnected by the HVDC link. Recently, several algorithms have been proposed and demonstrated to improve the ac system stability by implementing inertia emulation (IE) functions in the HVDC VSC stations. However, the capability of the VSC-HVDC to achieve the IE control is not clear. According to the previous research, the IE control strategy has been studied without concerning the impact of the practical control process, which will introduce some time delay into the IE realization. In this paper, a detailed multi-terminal HVDC VSC control module, including the phase-locked loop (PLL) and low pass filter (LPF), is considered in order to analyze the multi-terminal HVDC network impact on the IE performance. The analysis indicates that the frequency performance of the ac network with IE integrated HVDC transmission can be nearly as good as that directly connected with the ac subsystem which involves a high penetration of conventional generation units, except for the short time delay introduced by the VSC control modules. The effectiveness of IE performance will be compromised if the response delay is significant. The simulation results have verified the analysis.

  • Jessica D. Boles; Yiwei Ma; Leon M. Tolbert; Fred Wang
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    Battery energy storage systems (BESSs) are commonly used for frequency support services in power systems because they have fast response times and can frequently inject and absorb active power. Lithium-ion (Li-ion) BESSs dominate the grid energy storage market now, but Vanadium redox flow (VRB) BESSs are predicted to contend in future markets for large-scale storage systems. Previously, a Li-ion BESS emulator has been developed for a grid emulation system known as the Hardware Testbed (HTB), which consists of converters controlled to emulate different power system components. In this paper, we develop a VRB BESS emulator with a VRB-specific internal battery model and a power electronics interface similar to that of the Li-ion BESS emulator. Then, we compare the effectiveness of the VRB and Li-ion technologies for primary frequency regulation and inertia emulation applications. It is concluded that these two technologies are virtually indistinguishable from the power system's perspective when conducting these services over a short period of time.

  • Xingxuan Huang; Shiqi Ji; Sheng Zheng; Jingjing Sun; Leon M. Tolbert; Fred Wang; Marko Laitinen; William Giewont
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    The impact of the body diode and the anti-parallel junction barrier Schottky (JBS) diode on the switching performance of the 3rd generation 10 kV SiC MOSFET from Wolfspeed/Cree is investigated in detail at various junction temperatures. The switching performance with and without the anti-parallel JBS diode is tested by specific layout design of the 10 kV MOSFET module. The body diode of the 10 kV SiC MOSFET has excellent reverse recovery performance from 25°C to 125 °C, indicating it is a suitable candidate for freewheeling diode. The application of anti-parallel JBS diode will slow down the turn-off transient and result in lower turn-off dv/dt and higher turn-off energy loss, while its impact on the turn-on transient is not significant.

  • Paige Williford; Edward A. Jones; Zhe Yang; Jianliang Chen; Fred Wang; Sandeep Bala; Jing Xu
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    The dead-time in voltage source converters can have significant impact on power quality and efficiency, and because these losses scale proportionally with switching frequency, it is important to study the impact of these losses in wide bandgap based converters, like SiC and GaN. This paper focuses on the impact of dead-time on the total loss of a 5 kW, single phase, GaN-based inverter, and an experimental model of dead-time losses for various dead-times was developed based on static and dynamic characterization results. The results show that in a GaN-based voltage source inverter (VSI), a 100 ns dead-time setting can attribute up to 30% additional switching loss and is a strong function of load current level and temperature. A comparison of losses between fixed and adaptive dead-time was studied, and an optimal fixed dead-time setting based on the analysis was implemented and verified in experiment.

  • Craig Timms; Liang Qiao; Fred Wang; Zheyu Zhang; Dong Dong
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    This paper presents a new boundary condition for designing phase legs when using the decoupling capacitance method. New SiC MOSFETs have much higher short-circuit currents-over 14X datasheet rating-then comparable Si IGBT devices. The energy draw on the decoupling capacitance due to this can be a large step input that over-voltages the device if not accounted for. Decoupling capacitance requirements have previously been based on switching conditions during normal operation and may not be sufficient for high current devices or modules. Furthermore, fast protection work has focused on lower current discrete devices whereas this issue becomes more prevalent in higher current configurations. Analysis of device over-voltage during short-circuit events is presented along with new sizing guidelines for DC link decoupling capacitance.

  • Craig Timms; Liang Qiao; Fred Wang; Zheyu Zhang; Dong Dong
    2018 IEEE Energy Conversion Congress and Exposition (ECCE)
    2018

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    This paper presents the occurrence of potentially destructive oscillation in paralleled power MOSFETs during short-circuit events. Paralleling discrete power devices is desirable in many designs in order to increase power output. Short circuits cause high voltages, saturation current and local temperatures creating unstable environments within devices. Current redistribution can occur between device gates in this environment which can excite oscillation in parallel circuitry if not properly accounted for. Analysis of the phenomenon including experimental results are presented along with mitigation steps.

  • Fei Yang; Zhiqiang Jack Wang; Zheyu Zhang; Steven Campbell; Fred Wang; Madhu Chinthavali
    2018 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2018

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    Middle-point inductance Lmiddle can be introduced in power module designs with P-cell/N-cell concept. In this paper, the effect of middle-point inductance on switching transients is analyzed first using frequency domain analysis. Then a dedicated multiple-chip power module is fabricated with the capability of varying Lmiddle. Extensive switching tests are conducted to evaluate the device's switching performance at different values of Lmiddle. Experiment result shows that the active MOSFET's turn-on loss will decrease at higher values of Lmiddle while its turn-off loss will increase. Detailed analysis of this loss variation is presented. In addition to switching loss variation, it is also observed that different voltage stresses are imposed on the active switch and anti-parallel diode. Specifically, in the case of lower MOSFET's turn-off, the maximum voltage of lower MOSFET increases as Lmiddle goes up; however, the peak voltage of anti-parallel diode decreases significantly. The analysis and experiment results will provide design guidelines for multiple-chip power module package design with P-cell/N-cell concept.

  • Fei Yang; Zhenxian Liang; Zhiqiang Jack Wang; Fred Wang
    2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2017

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    In this paper, a low parasitic inductance SiC power module with double-sided cooling is designed and compared with a baseline double-sided cooled module. With the unique 3D layout utilizing vertical interconnection, the power loop inductance is effectively reduced without sacrificing the thermal performance. Both simulations and experiments are carried out to validate the design. Q3D simulation results show a power loop inductance of 1.63 nH, verified by the experiment, indicating more than 60% reduction of power loop inductance compared with the baseline module. With 0Ω external gate resistance turn-off at 600V, the voltage overshoot is less than 9% of the bus voltage at a load of 44.6A.

  • Jacob Dyer; Zheyu Zhang; Fred Wang; Daniel Costinett; Leon M. Tolbert; Benjamin J. Blalock
    2017 IEEE 5th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)
    2017

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    This paper introduces a dead-time optimization technique for a 2-level voltage source converter (VSC) using turn-off transition monitoring. Dead-time in a VSC impacts power quality, reliability, and efficiency. Silicon carbide (SiC) based VSCs are more sensitive to dead-time from increased reverse conduction losses and turn-off time variability with operating conditions and load characteristics. An online condition monitoring system for SiC devices has been developed using gate drive assist circuits and a micro-controller. It can be leveraged to monitor turn-off time and indicate the optimal dead-time in each switching cycle of any converter operation. It can also be used to specify load current polarity, which is needed for dead-time optimization in an inverter. This is an important distinction from other inverter dead-time elimination/optimization schemes as current around the zero current crossing is hard to accurately detect. A 1kW half-bridge inverter was assembled to test the turn-off time monitoring and dead-time optimization scheme. Results show 91% reduction in reverse conduction power losses in the SiC devices compared to a set dead-time of 500ns switching at 50 kHz.

  • Wen Zhang; Zheyu Zhang; Fred Wang; Daniel Costinett; Leon Tolbert; Benjamin Blalock
    2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2017

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    While fast switching brings many benefits, it also presents unwanted ringing during switching transient. In this paper, an increasing magnitude ringing phenomenon is observed during the MOSFET turn-off transient. The unusual phenomenon is replicated in simulation and it is found the MOSFET channel is turned on again after it is turned off. The major cause to this unexpected turn on is found to be common source inductance and a moderate 3 nH one in simulation replicates the severe self-turn-on ringing observed in experiment. This paper reveals the detrimental effect of common source inductance in fast switching. Therefore, Kelvin source connection in circuit and package design is strongly recommended.

  • Zheyu Zhang; Craig Timms; Jingyi Tang; Ruirui Chen; Jordan Sangid; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett
    2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2017

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    Cooling a converter to low temperatures, e.g. using cryogenic cooling, can significantly improve the efficiency and density of a power conversion system. For the development and optimization of a cryogenically-cooled converter, an understanding of power semiconductor characteristics is critical. This paper focuses on the characterization of high-voltage, high-speed switching, power semiconductors at cryogenic temperature. First, the testing setup for cryogenic temperature characterization is introduced. Three testing setups are established for cryogenic switch characterization, including: 1) on-state resistance and forward voltage drop of the body diode, 2) leakage current and breakdown voltage, and 3) switching characteristics. For each testing set up, the corresponding testing configurations, hardware setups, and practical considerations are summarized. Additionally, the test results at cryogenic temperature are illustrated and analyzed for 650-V Si CoolMOS. It is then demonstrated that when the cryogenic temperature test results are compared to that of room temperature, the device performance varies significantly; for example: on-state resistance reduces by 63%, breakdown voltage drops by 31%, switching time decreases and switching energy loss decreases by 26%. Furthermore, the peak dv/dt during transient switching at cryogenic temperature exceeds 100 V/ns which is comparable to the emerging wide bandgap Gallium Nitride devices.

  • Shiqi Ji; Sheng Zheng; Zheyu Zhang; Fred Wang; Leon M. Tolbert
    2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2017

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    Silicon Carbine (SiC) based power semiconductor devices have increased voltage blocking capability, in the meantime, satisfactory switching performance as compared to conventional Silicon (Si) devices. This paper focuses on the latest generation 10 kV / 20 A SiC MOSFETs and investigates their protection schemes and temperature-dependent switching characteristics. A high voltage double pulse test platform is constructed including solid state circuit breaker, gate drive and hot plate under device under test (DPT) for temperature-dependent characterization. A behavioral model is established to analytically investigate switching performance of 10 kV SiC MOSFETs, and the temperature-dependent factors are studied in detail. The experimental results under various load currents and gate resistances from 25 C to 125 C at 7 kV dc-link voltage are presented.

  • Jessica D. Boles; Yiwei Ma; Wenchao Cao; Leon M. Tolbert; Fred Wang
    2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2017

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    Preparing power systems to better accommodate renewable energy sources has become increasingly more important as penetration levels rise, and energy storage systems are excellent for suppressing the fluctuations of renewable and for providing other ancillary services to the grid. The Hardware Testbed (HTB) is a novel converter-based grid emulator created for studying the needs associated with high renewable penetration, but the system currently lacks battery storage capability. This paper proposes a configurable Lead Acid and Lithium Ion battery storage emulator equipped with a two-stage power electronics interface, which is capable of independent active and reactive power control as well as inertia emulation. Each part of the emulator is described in detail, in terms of both the models used and the control algorithms governing them. The emulator's behavior is simulated, tested, and confirmed to function correctly with the HTB and will be used to study scenarios in which battery storage can be used to support renewables and other dynamic power system needs.

  • Shuoting Zhang; Bo Liu; Sheng Zheng; Yiwei Ma; Fred Wang; Leon M. Tolbert
    2017 IEEE Energy Conversion Congress and Exposition (ECCE)
    2017

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    A hardware test-bed (HTB) has been developed to realize power system emulation by mimicking the system components with universal three-phase voltage source converters (VSCs). The VSC-based transmission line emulator has also been successfully developed to flexibly represent interconnected ac lines under normal operating conditions. As the most serious short-circuit fault condition, the three-phase short-circuit fault emulation is essential for power system studies. This paper proposes a model to realize the three-phase short-circuit fault emulation within the emulated transmission line. At the same time, a combination method is proposed to eliminate the undesired transients caused by the current reference step changes while switching between the fault state and normal state.

  • Shuoting Zhang; Yalong Li; Bo Liu; Xiaojie Shi; Leon M. Tolbert; Fred Wang
    2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2017

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    Hybrid ac/dc transmission can increase the power transfer capability of long ac transmission lines. High voltage dc (HVDC) converters are needed, and the line-commutated converter (LCC) is used considering the dc fault current controllability. However, zero-sequence current can be generated due to the coupled transmission lines, and it will flow into the HVDC converters as a fundamental frequency current component on dc side (i60). The LCC will convert i60 to dc current components on the ac side, which may cause potential converter transformer saturation. This paper analyzes the influence of coupled transmission lines on i60 and the converter transformer saturation and proposes two possible solutions to avoid converter transformer saturation. The simulation results verify the effectiveness of the proposed methods.

  • Shuoting Zhang; Yalong Li; Fred Wang
    2017 IEEE Energy Conversion Congress and Exposition (ECCE)
    2017

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    Multi-terminal dc (MTDC) grid has been considered as a promising future transmission and distribution system architecture, especially for remote renewable energy integration. However, short-circuit faults can be more detrimental to dc grids than ac grids. The lack of effective and economical dc circuit breakers and potential significant impact of dc fault on the connected ac system have become the main barrier for the dc grid application. This paper analyzes the major differences of dc grid and ac grid under short-circuit fault conditions. After that, the dc fault impact on the connected ac system is evaluated by comparing with an equivalent multi-terminal ac (MTAC) grid. Simulation results indicate that the dc fault impact on the connected ac system stability can be small if fast dc circuit breakers or full-bridge modular multi-level converters (MMCs) are employed. The impact of equivalent multiple ac faults on the connected ac system is small under the defined system scenarios.

  • Edward A. Jones; Paige Williford; Zhe Yang; Jianliang Chen; Fred Wang; Sandeep Bala; Jing Xu; Joonas Puukko
    2017 IEEE 12th International Conference on Power Electronics and Drive Systems (PEDS)
    2017

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    This paper establishes a methodology for maximizing the voltage and current capability of a GaN FET, while maintaining an acceptably low overshoot voltage and junction temperature to prevent damage to the device. Two key contributions of this work are the gate driver design parameters and operating conditions that impact overshoot voltage, and a heatsink design for bottom-side cooling that avoids thermal vias. Additionally, the static and dynamic characterization steps required for this methodology are described, and an example GaN-based full-bridge inverter was designed and tested for experimental verification, using GaN gate injection transistors with capacitive gate driver circuits.

  • Edward A. Jones; Paige Williford; Fred Wang
    2017 IEEE 5th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)
    2017

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    A fast overcurrent protection scheme was developed for GaN gate injection transistors (GITs), harnessing the relationship between the externally measured vgs and id in steady-state operation. This relationship has been characterized in both static and dynamic testing over a wide range of operating conditions, and a circuit has been constructed to implement this control scheme. The circuit uses analog components to integrate the protection feature into a commercially available GIT gate driver. The scheme was experimentally verified in a double pulse test setup for experimental verification, and its total fault response time was recorded at less than 70 ns, with 400 V dc bus and a 30 A threshold. Compared with conventional desaturation protection, which detects faults based on drain voltage rather than gate voltage, the proposed scheme offers benefits in terms of speed, temperature invariance, flexibility in threshold selection, and minimal impact on the GIT's normal switching behavior.

  • Edward A. Jones; Zheyu Zhang; Fred Wang
    2017 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2017

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    The higher switching speed of wide bandgap devices requires new analysis to interpret voltage waveforms during turn-on and turn-off transients. Although the Miller effect remains a dominant feature, the conventional Miller plateau equations do not accurately model the dvds/dt for fast-switching devices such as GaN FETs. This paper derives equations for instantaneous dvds/dt based on static datasheet parameters, considering the Miller effect and the displacement of junction capacitance charges through the saturated channel. These equations will be verified with experimental results for an enhancement-mode GaN FET across a range of operating conditions. Furthermore, the peak dvds/dt is predicted using the derived equations, and shown to be more accurate than other models when compared to GaN experimental results.

  • Shiqi Ji; Ting Lu; Zhengming Zhao; Hualong Yu; Fred Wang
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    The integration of series connection of insulated gate bipolar transistors (IGBTs) and multi-level can achieve high voltage converters with low total harmonics distortion (THD). However, due to the transient voltage unbalance, the series connection technology has not been widely applied. Asynchronous gate drive signals, which cause series-connected IGBTs not to turn-on and turn-off at the same time, result in serious unbalanced voltage sharing. This paper presents an active voltage balancing control with its electromagnetic compatibility (EMC) design to solve the asynchronous gate signal problem. The effectiveness of the active voltage balancing control has been experimentally validated in a 10kV dc-link voltage three-level bridge using two 4.5kV HV-IGBTs in series-connection.

  • Bo Liu; Ren Ren; Edward Jones; Fred Wang; Daniel Costinett; Zheyu Zhang
    2016 IEEE Energy Conversion Congress and Exposition (ECCE)
    2016

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    Wide bandgap (WBG) semiconductors owing to their low loss and high switching capability, are gradually adopted in high power-density high efficiency applications, and impose new challenges from control to hardware design. In this paper, a Gallium Nitride (GaN) HEMT plus SiC diode based Vienna type rectifier is proposed to serve as the power factor correction stage for a high-density battery charger system. To meet low current harmonic requirement, PWM voltage distortion during turn-off transition, found as the main harmonics contributor, is studied. The distortion mechanism led by different parasitic capacitances of WBG devices is presented. A mitigation scheme is thereafter proposed considering their nonlinear voltage-dependent characteristics and eventually deduced from a pulse-based turn-off compensation to a generic modulation correction. Simulation and experimental results through a 450 kHz enhancement-mode GaN based Vienna type rectifier finally demonstrate the high performance of the proposed approach, showing a THD reduction up to 7% with a relatively low-speed control.

  • Ren Ren; Bo Liu; Edward A. Jones; Fred Wang; Zheyu Zhang; Daniel Costinett
    2016 IEEE Energy Conversion Congress and Exposition (ECCE)
    2016

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    Due to the realization of zero voltage switching (ZVS) under the full load range, LLC resonant converter is widely adopted in the telecom, battery charger and several applications, characterized with high efficiency, high frequency and high power density, to realize DC conversion. Recently, by using Gallium Nitride (GaN) HFETS, switching frequency of LLC converters is further increased. However, ZVS failure cannot be predicted accurately in the high switching frequency condition by only considering traditional constraints generally applied in the low frequency design. The traditional constraints result in a too optimistic estimation of the dead time to obtain ZVS without considering the reverse resonance under the dead time and the design of resonant parameters at high resonant frequency and high load condition. The experiment shows the LLC converter loses ZVS even through the converter satisfies the ZVS constraints proposed by previous paper. In this paper, the failure mode will be investigated in detail and an accurate ZVS boundary is proposed for high frequency LLC converter design. The proposed theory was verified on a 1 MHz, 1500 W LLC prototype.

  • Zheyu Zhang; Fred Wang; Daniel J. Costinett; Leon M. Tolbert; Benjamin J. Blalock; Xuanlyu Wu
    2016 IEEE Energy Conversion Congress and Exposition (ECCE)
    2016

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    Junction temperature is a critical indicator for health condition monitoring of power devices. Concerning the reliability of emerging silicon carbide (SiC) power semiconductors due to immaturity of new material and packaging, junction temperature measurement becomes more significant and challenging, since SiC devices have low on-state resistance, fast switching speed, and high susceptibility to noise and parasitics in circuit implementations. This paper aims at developing a practical and cost-effective approach for online junction temperature monitoring of SiC devices using turn-off delay time as the thermo-sensitive electrical parameter (TSEP). The sensitivity is analyzed for fast switching SiC devices. A gate impedance regulation assist circuit is designed to improve the sensitivity by a factor of 60 and approach hundreds of ps/°C in the case study with little penalty of the power conversion performance. Also, an online monitoring system based on three gate assist circuits is developed to monitor the turn-off delay time in real time with the resolution within hundreds of ps. In the end, the micro-controller is capable of “reading” junction temperature during the converter operation with less than 0.5 °C measurement error. Two testing platforms for calibration and online junction temperature monitoring are constructed, and experimental results demonstrate the feasibility and accuracy of the proposed approach. Furthermore, the proposed gate assist circuits for sensitivity improvement and high resolution turn-off delay time measurement are transistor based and suitable for chip level integration.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    High speed switching of WBG devices causes their switching behavior to be highly susceptible to the parasitics in the circuit, including inductive loads. An inductive load consisting of a motor and power cable significantly worsens the switching speed and losses of SiC MOSFETs in a PWM inverter. This paper focuses on the motor plus power cable based inductive load, and aims at mitigating its negative influence during the switching transient. An auxiliary filter is designed and inserted between the converter and inductive load so that the parasitics of the load will not be “seen” from the converter side during the switching transient. Test results with Cree 1200-V/20-A SiC MOSFETs show that the proposed auxiliary inductor enables the switching performance with a practical inductive load (e.g., motor plus cable based inductive load) to exhibit behavior close to that when the optimally-designed double pulse test load inductor is employed.

  • Edward A. Jones; Fred Wang; Daniel Costinett; Zheyu Zhang; Ben Guo
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    Enhancement-mode GaN HFETs enable efficient high-frequency converter design, but this technology is relatively new and exhibits different characteristics from Si or SiC MOSFETs. GaN performance at elevated temperature is especially unique. Turn-on time increases significantly with temperature, and turn-on losses increase as a result. This phenomenon can be explained based on the relationships between junction temperature and GaN device transconductance, and between transconductance and turn-on time. An analytical relationship between temperature and turn-on loss has been derived for the 650-V GS66508 from GaN Systems, and verified with experimental results. Based on this relationship, a detailed model is developed, and a simplified scaling factor is proposed for estimating turn-on loss in e-mode GaN HFETs, using room-temperature switching characterization and typically published datasheet parameters.

  • Ren Ren; Bo Liu; Edward A. Jones; Fred Wang; Zheyu Zhang; Daniel Costinett
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    Gallium Nitride (GaN) HFETS are an enabling technology for high-density converter design. This paper proposes a three-level dc-dc converter with dual outputs based on enhancement-mode GaN devices, intended for use as a battery charger in aircraft applications. The charger can output either 28 V or 270 V, selected with a jumper, which meets the two most common dc bus voltages in airplanes. It operates as an LLC converter in the 28 V mode, and as a buck converter in the 270 V mode. In both operation modes, the devices can realize zero-voltage-switching (ZVS). With the chosen modulation method, the converter can realize the frequency doubling function to act as an interleaved converter. For the LLC mode, the resonant frequency is twice the switching frequency of primary-side switches, and for buck mode, the frequency of the output inductor current is also twice the switching frequency. This helps to reduce the size of magnetics while maintaining low switching loss. Also, the converter utilizes the matrix transformer with resonant parameters designed to avoid ZVS failure. The operation principle of the converter is analyzed and verified on a 1MHz resonant frequency prototype.

  • Yutian Cui; Weimin Zhang; Leon M. Tolbert; Daniel J. Costinett; Fred Wang; Benjamin J. Blalock
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    In this paper, a single stage system which converts 400 V to 1 V within one stage and performs as the high voltage point of load (HV POL) converter for data centers is proposed. A load dependent soft switching method has been proposed for half bridge current doubler with simple auxiliary circuit. The operation principles of the soft switching converter have been analyzed in detail. A lossless RCD current sensing method is used to sense the output current value to reduce the auxiliary circuit loss and turn off loss of secondary side devices as load reduces to achieve higher efficiency. Experimental efficiency has been tested to prove the proposed method can increase the converter's efficiency in both heavy and light load condition. A prototype of the half bridge current doubler circuit has been built to verify the theory.

  • Saeed Anwar; Weimin Zhang; Fred Wang; Daniel J. Costinett
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    In this paper, an integrated, reconfigurable DC-DC converter for plugin and hybrid Electric Vehicles (EV) is proposed. The converter integrates functionality for both EV powertrain and charging operation into a single unit. During charging, the proposed converter functions as a DAB converter, providing galvanic isolation. For powertrain operation, the converter functions as an interleaved boost converter. During light load powertrain operation, the efficiency of the converter can be further improved by employing the integrated DAB. The proposed integrated converter does not require any extra relays or contactors for charging and powertrain operation. By using such integration, the overall volume and weight of the power electronics circuits, passives and associated cooling system can be improved. In addition, the power flow efficiency from EV battery to the high voltage DC bus for the motor inverter can be improved. The experimental results of the prototype are presented to verify the functionality of the proposed converter.

  • Jacob Dyer; Zheyu Zhang; Fred Wang; Daniel Costinett; Leon M. Tolbert; Benjamin J. Blalock
    2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)
    2016

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    Many intelligent gate drivers being designed for new state-of-the-art WBG devices typically only focus on protection and driving capabilities of the devices. This paper introduces an intelligent gate driver that incorporates online condition monitoring of the WBG devices. For this specific case study, three timing conditions (turn-off delay time, turn-off time, and voltage commutation time) of a silicon carbide (SiC) device are online monitored. This online monitoring system is achieved through gate driver assist circuits and a micro-controller. These conditions are then utilized to develop converter-level benefits for the converter application the SiC devices are placed in. Junction temperature monitoring is realized through turn-off delay time monitoring. Dead-time optimization is achieved with turn-off time monitoring. Dead-time compensation is obtained with turn-off time and voltage commutation time monitoring. The case study converter assembled for testing purposes is a half-bridge inverter using two SiC devices in a phase-leg configuration. All timing conditions are correctly monitored within reasonable difference of the actual condition time. A calibration curve was created to give a direct relationship between turn-off delay time and junction temperature. The half-bridge inverter can operate at 600 Vdc input and successfully obtain a junction temperature measurement through monitored td_off and the calibration curve. Furthermore, the proposed online condition monitoring system is transistor based and suitable for the chip level integration, enabling this practical approach to be cost-effective for end users.

  • Bo Liu; Shuoting Zhang; Sheng Zheng; Yiwei Ma; Fred Wang; Leon M. Tolbert
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    Ac transmission line emulator is the bridge to interconnect ac systems to fulfill the grid emulation function, where all the emulator elements such as generators, loads and lines are implemented by universal three-phase voltage source converters. In this paper, three design issues are addressed. First, the impact of ac voltage switching noise on the performance of a transmission line emulator in terms of steady state and dynamic accuracy is described, and an improved sampling algorithm is presented. Then, a new dc offset controller is proposed to mitigate the induced dc current flow by sampled dc offset noise, to guarantee the normal operation of ac line emulator. Furthermore, the stability issues regarding different emulation schemes are analyzed, providing a metric to predict the feasible impedance range that a line emulator can reach and to choose the proper emulation strategy for a specific system. Finally, experimental results obtained from a multi-converter based hardware testbed verify the design schemes.

  • Xiaojie Shi; Yalong Li; Zhiqiang Wang; Bo Liu; Leon M. Tolbert; Fred Wang
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    This paper presents a steady-state analysis of the modular multilevel converter (MMC) for the second order voltage and current ripple prediction under unbalanced conditions, taking the impact of negative sequence current control into account. Using the circular relationship among current and voltage quantities, the magnitudes and initial phase angles of different circulating current components can be evaluated theoretically. With negative sequence phase current control, the positive, negative and zero sequence circulating currents are generated by more voltage sources and are no longer decoupled. Based on the generic inner relationship among current and voltage quantities, this steady state analysis is applicable to the MMC under both rectifier and inverter operating modes. Experimental results from a scaled down three-phase MMC system are provided to support the theoretical analysis and derived model.

  • Shuoting Zhang; Yiwei Ma; Liu Yang; Fred Wang; Leon M. Tolbert
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    A real-time hardware testbed (HTB) has been constructed to emulate the power system by modular regenerative converters. This allows system realistic testing and demonstration with the true measurement, communication, and control. However, the size of the system that can be emulated by the HTB is limited, and certain phenomena are not easy or not needed to be modeled in the HTB. A hybrid emulation platform, which combines real time digital simulator (RTDS) and HTB, is developed in this paper to complement the advantages of RTDS and HTB. A power electronics converter is designed to act as the power interface between the RTDS and the HTB, and an integrated interface with two complementary algorithms is implemented to realize the hybrid emulation stably under different system conditions. At the same time, the closed loop control method under dq0 axis is implemented to realize faster response characteristics, and a time delay correction algorithm is integrated into the Park transformation. Experiment results demonstrate the performance and effectiveness of the hybrid emulation compared with the pure HTB emulation and digital simulation.

  • Yiwei Ma; Liu Yang; Fred Wang; Leon M. Tolbert
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    One way to incorporate the increasing amount of wind penetration is to control wind turbines to emulate the behavior of conventional synchronous generators. This paper presents a comprehensive virtual generator control for the full converter wind turbine considering the power balance. The voltage closed-loop virtual synchronous generator control of the wind turbine allows it to work under both grid-connected and stand-alone condition. Power system control and power dispatch can also be realized through the control. The power balance of the wind turbine system is achieved by controlling the rotor speed of the turbine according to the loading condition. The optional integration of the short term turbine level energy storage is also considered. Experimental results on emulation testbed are presented to demonstrate the feasibility and effectiveness of the proposed control method.

  • Fengkai Hu; Liu Yang; Jingxin Wang; Yiwei Ma; Kai Sun; Leon M. Tolbert; Fred Wang
    2016 IEEE Power and Energy Society General Meeting (PESGM)
    2016

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    A measurement-based voltage stability assessment and closed-loop control strategy is proposed and demonstrated on the Center for Ultra-Wide-Area Resilient Electric Energy Transmission Networks (CURENT) Hardware Test Bed (HTB) system, a power electronic converter-based research and experiment platform. This new strategy is based on an N+1 buses equivalent proposed recently by Ref. [1] for calculating real-time voltage stability margins on individual tie lines of a load area. Two voltage stability scenarios are designed and implemented on the HTB system that emulates a three-area power system integrating conventional generation, wind generation, and multi-terminal HVDC transmission. The tests validate the effectiveness of real-time monitoring and closed-loop control against voltage instability initiated from one tie line of the load area.

  • Yalong Li; Xiaojie Shi; Fred Wang; Leon M. Tolbert; Jin Liu
    2016 IEEE Energy Conversion Congress and Exposition (ECCE)
    2016

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    Dc fault protection is a main challenge in voltage source converter (VSC) based multi-terminal high voltage direct current (HVDC) systems. This paper develops a systematic dc fault protection strategy for systems utilizing hybrid dc circuit breakers as the main protection devices. A two-step fault detection method to accommodate the proactive hybrid dc circuit breaker has been simulated and demonstrated with both fast speed and selectivity. The necessities of temporary blocking HVDC converters for both pole-to-pole and pole-to-ground faults have been evaluated, and the corresponding criteria have been established. In order to achieve fast system recovery after the fault clearance, voltage margin control is proposed to simplify the restart sequence for different converters and reduces the dc voltage variation during the process. The overall protection strategy is demonstrated in a 4-terminal HVDC simulation platform, showing a total dc fault recovery time of ~200 ms.

  • Xiaojie Shi; Yalong Li; Leon M. Tolbert; Fred Wang
    2016 IEEE 8th International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia)
    2016

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    In a multi-terminal HVDC (MTDC) system connecting windfarms, the widely used dc voltage margin and droop control cannot be directly applied to offshore converters due to the lack of existing ac grid. Therefore, the dc voltage regulation only relies on the onshore converters, and its variation will not affect wind power generation. This paper introduces a cascaded droop control scheme for offshore converters and windfarms, which enables autonomous wind power adjustment during onshore station side ac faults, using offshore side ac voltage magnitude as an intermediate variable. Different from the traditional dc voltage droop control (νdc - pdc droop), the embedded dead-band and offshore station transformer leakage impedance will greatly impact the operation point of the MTDC system if the proposed cascade droop control is used, thus requiring special consideration during droop parameters design. Simulation results from a four-terminal HVDC system generated with Matlab/Simulink and experimental results from a scaled down prototype are provided to support the theoretical analysis and proposed control scheme.

  • Shiqi Ji; Fred Wang; Leon Tolbert; Ting Lu; Zhengming Zhao; Hualong Yu
    2016 IEEE Energy Conversion Congress and Exposition (ECCE)
    2016

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    The series connection of insulated gate bipolar transistors (IGBTs) allows the operation at voltage levels higher than the rated voltage of one IGBT. However, the technology has not been widely applied due to transient voltage unbalance. Asynchronous gate drive signals, which cause series-connected IGBTs not to turn-on and turn-off at the same time, result in serious unbalanced voltage sharing. This paper presents an active voltage balancing control for multi series connected HV-IGBTs including the active voltage balancing control (AVBC) circuit integrated in the gate driver and the control for multi series connected IGBTs. The effectiveness of the control has been experimentally validated in a 10 kV dc-link voltage converter using four 4.5 kV HV-IGBTs in series connection.

  • Wenchao Cao; Xuan Zhang; Yiwei Ma; Fred Wang
    2016 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2016

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    To address the instability issue in renewable systems of a radial-line structure with multiple current-controlled interface inverters, this paper proposes a practical stability criterion to easily analyze the system stability and a controller parameter design method to guarantee stable system operation with good oscillation damping performance. The proposed impedance-based sufficient stability criterion does not need the pole calculation of the return ratio matrices, while the phase margin of the system can still be obtained for system dynamic performance evaluation. Based on the phase margin information, design rules of inverter controller parameters are further proposed for system stability. The output admittance model of current-controlled inverters in an arbitrary d-q frame is also derived to facilitate the stability analysis. Simulation and experimental results verify the effectiveness of the proposed stability criterion and controller parameter design method.

  • Jing Xue; Fred Wang
    2016 IEEE Energy Conversion Congress and Exposition (ECCE)
    2016

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    This paper focuses on the liquid-cooling method of power inductors in electromagnetic interference (EMI) filters for high power motor drive application. A literature study on magnetic cooling methods with encapsulation, potting and liquid-cooled cold plate is carried out. An empirical evaluation method for potting effectiveness is proposed and validated with prototype encapsulation and example potting materials. One simplified experiment-based thermal modeling method for inductors is also developed with the purpose of avoiding time-consuming finite element simulation. Based on the potting evaluation method and simplified thermal modeling, one comprehensive design procedure is summarized.

  • Wenchao Cao; Yiwei Ma; Fred Wang
    2016 IEEE Energy Conversion Congress and Exposition (ECCE)
    2016

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    Three-phase inverter-based multi-bus ac systems could suffer from the small-signal instability issue due to the dynamic interaction among inverters and passive components in the systems. To address this issue, this paper proposes two harmonic stability analysis methods and an inverter controller parameter design approach for stable system operation. The proposed sequence-impedance-based harmonic stability analysis methods can reduce the computation effort by avoiding the calculation of right-half-plane poles of impedance ratios, as compared with the impedance-based analysis method using Nyquist stability criterion. Therefore, the controller parameters can be designed in the forms of stability regions in the parameter space, by repetitively applying the proposed stability analysis methods. In addition, the proposed stability analysis methods enable the system stability by using only measured component impedances. Experimental results of an inverter-based two-area system validate the effectiveness of the proposed stability analysis methods and parameter design approach.

  • Fei Yang; Zhenxian Liang; Zhiqiang Wang; Fred Wang
    2016 International Symposium on 3D Power Electronics Integration and Manufacturing (3D-PEIM)
    2016

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    In this paper, the parasitic inductance extraction method is studied in detail. It is analyzed that the value of the lumped power loop inductance will be varying at different switching transients. With the aid of Ansys Q3D Extractor, different values of lumped power loop parasitic inductance are obtained at different time intervals during turn-off process for both upper and lower devices. A dedicated 3D Planar Bond All Module with access to both kelvin and terminal drain-to-source voltage is built, and the parasitic inductance of the module is experimentally extracted by comparing those two voltages in double pulse tests. The experiment result shows good agreement with the simulated parasitic inductance value thus validating the extraction and simulation method.

  • Yutian Cui; Weimin Zhang; Leon M. Tolbert; Daniel J. Costinett; Fred Wang; Benjamin J. Blalock
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    High voltage DC (400 V) power supply architecture is becoming a standard in today's data center power supply. To further convert from 400 V to 1 V, usually several power stages are connected in series. Therefore, even if the efficiency of each power stage is high; the overall system efficiency is limited because of the multiplication of each converter's efficiency. In this paper, a single power stage system which converts 400 V to 1 V directly and performs as the high voltage point of load (HV POL) is proposed. A multi-phase interleaved phase shift pulse width modulation (PWM) DC/DC converter with input series and output parallel (ISOP) connection is selected as the power stage topology. A simplified two phase connected system is discussed in this paper. Common duty cycle control technique is used to control the ISOP connected converters. Input voltage sharing and output current sharing is analyzed with different types of mismatches in the circuit. Finally, the preliminary testing results are given.

  • Weimin Zhang; Yutian Cui; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    This paper investigates the Gallium Nitride (GaN) devices benefits on the LLC resonant DC-DC converter. First, the relationship between the device parameters and converter current based on an analytical loss model of LLC resonant converter has been established. After that, the loss analysis and comparison between Si-based and GaN-based converter is presented. The GaN-based design demonstrates about 40% loss reduction compared with the Si-based design. An insight on the extra winding loss due to the asymmetrical primary side and secondary side current is presented. The extra winding loss is reduced by 18% with GaN device application. The overall loss breakdown and the experimental result show the 20% overall loss reduction of the GaN-based LLC converter compared with the Si-based LLC converter.

  • Edward A. Jones; Fred Wang; Daniel Costinett; Zheyu Zhang; Ben Guo
    2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)
    2015

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    Cross conduction is a well-known issue in buck converters and phase-leg topologies, in which fast switching transients cause spurious gate voltages in the synchronous device and a subsequent increase in switching loss. Cross conduction can typically be mitigated with a well-designed gate drive, but this is challenging with WBG devices. Phase legs using SiC and GaN devices can experience heavy cross conduction loss due to their exceptionally fast switching transients. Enhancement-mode GaN heterojunction field-effect transistors (HFETs) in the 600-V class are now commercially available, with switching transients as fast as 200 kV/μs. A double pulse test setup was used to measure the switching loss of one such GaN HFET, with several gate drive circuits and resistances. The results were analyzed and compared to characterize the effects of cross conduction in the active and synchronous devices of a phase-leg topology with enhancementmode GaN HFETs.

  • Sheng Zheng; Jingxin Wang; Fei Yang; Fred Wang; Leon M. Tolbert; Daniel J. Costinett
    2015 IEEE Energy Conversion Congress and Exposition (ECCE)
    2015

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    Continuous variable series reactors (CVSRs), as a cost effective alternative to flexible AC transmission system (FACTS) series compensators, have been proposed to continuously vary the line reactance and control the power flow. The development of the power electronics based dc controller (DCC) is essential and unique to meet the need of CVSR in utility transmission grid applications. In addition to supplying the needed dc current to the CVSR dc winding, the DCC has to deal with the interaction from the ac winding. CVSR, together with DCC, will be installed outdoor in a substation, so the operation environment could be extremely harsh. The detailed design and implementation of the DCC are presented, along with simulations demonstrating the close relationship between the load profile of dc winding and converter output impedance. A 1000 A, 20 kW field prototype has been constructed and tested with a 115 kV, 1500 A CVSR to experimentally verify the performance of the whole CVSR system.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett
    2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)
    2015

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    Four factors impact high speed switching of silicon carbide (SiC) devices in voltage source converters, including limited gate driving capability, cross-talk, parasitics associated in switching loop, and parasitics of inductive load. This paper focuses on a solution to mitigate the adverse impact of the aforementioned factors. First, an intelligent gate drive is developed for gate driving capability enhancement and cross-talk suppression. Second, placement and layout design of power devices, gate drive, and power stage board are proposed to minimize parasitics for fast switching and over-voltage mitigation. Third, an auxiliary filter is designed to mitigate the negative impact of inductive load's parasitics during the switching transient. Finally, by utilizing all techniques developed above, a three-phase voltage source inverter with Cree 1200-V/20-A SiC MOSFETs is established. Test results show that the switching behavior of SiC devices in actual three-phase voltage source inverter fed motor drives can mostly repeat the switching performance tested by the optimally-designed double pulse test.

  • Edward A. Jones; Fred Wang; Daniel Costinett; Zheyu Zhang; Ben Guo; Bo Liu; Ren Ren
    2015 IEEE Energy Conversion Congress and Exposition (ECCE)
    2015

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    GaN heterojunction field-effect transistors (HFETs) in the 600-V class are relatively new in commercial power electronics. The GaN Systems GS66508 is the first commercially available 650-V enhancement-mode device. Static and dynamic testing has been performed across the full current, voltage, and temperature range to enable GaN-based converter design using this new device. A curve tracer was used to measure Rds-on across the full operating temperature range, as well as the self-commutated reverse conduction (i.e. diode-like) behavior. Other static parameters such as transconductance and gate current were also measured. A double pulse test setup was constructed and used to measure switching loss and time at the fastest achievable switching speed, and the subsequent over-voltages due to the fast switching were characterized. Based on these results and analysis, an accurate loss model has been developed for the GS66508 to allow for GaN-based converter design and comparison with other commercially available devices in the 600-V class.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    This paper presents an active gate driver for Silicon Carbide (SiC) devices to fully utilize their potentials of high switching-speed capability in a phase-leg configuration. Based on the SiC device's intrinsic properties, a gate assist circuit consisting of two auxiliary transistors with two diodes is introduced to actively control the gate voltages and gate loop impedances of both devices in a phase-leg during different switching transients. Compared to a conventional gate driver, the proposed circuit has the capability of increasing the switching speed of the phase-leg power devices, suppressing the cross-talk to below device limits. Based on CREE's 2nd generation 1200-V SiC MOSFETs, the test results demonstrate the effectiveness of this active gate driver under various operating conditions. The switching time decreases by up to 28% during turn-on and 50% during turn-off in the prototype circuit, resulting in up to 31% reduction in switching energy loss. In addition, spurious gate voltages induced by cross-talk are limited within the required range.

  • Yutian Cui; Weimin Zhang; Leon M. Tolbert; Daniel J. Costinett; Fred Wang; Benjamin J. Blalock
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    In this paper, the design of a high step down ratio (66:1) phase shift full bridge (PSFB) DC/DC converter used for data center power supplies in terms of primary side MOSFETs selection is covered. A detailed analysis of the converter's operation considering the impact of the output junction capacitance of primary side MOSFETs on the current RMS value has been performed. The study shows that a smaller output junction capacitance will lead to a smaller RMS current value on both primary and secondary side. For the high step down phase shift full bridge converter, transformer winding loss is the dominant loss; the reduction of current through the transformer will lead to a higher efficiency of the whole converter. This phenomenon is observed in experimental waveforms, and its impact on the converter's efficiency is also validated through experiment.

  • Zheyu Zhang; Fred Wang; Daniel J. Costinett; Leon M. Tolbert; Benjamin J. Blalock; Haifeng Lu
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    Dead-time in the voltage source converter significantly affects the reliability, power quality and losses. For SiC devices, considering the high sensitivity of turn-off time to the operating conditions (> 5× difference between light load and full load), as well as large extra energy loss induced by reverse conduction during superfluous dead-time (~ 15% of the switching loss), traditional fixed dead-time setting becomes inappropriate. This paper introduces an approach to achieve optimum dead-time for SiC based voltage source converter. First, turn-off behaviors under various operating conditions are investigated, and the relation between optimal dead-times and load currents are established. Second, a practical method for adaptive dead-time regulation is proposed, which consists of a dead-time optimization model and two gate assist circuits to sense the voltage commutation time during turn-off transient. Via synthesizing the monitored switching condition together with the preset dead-time optimization model, the micro-controller is able to online adjust the dead-time. Finally, based on a buck converter with 1200-V SiC MOSFETs, the test results show that by means of the proposed method, the power loss decreases by 12% at full load and 18.2% at light load.

  • Zhiqiang Wang; Xiaojie Shi; Leon M. Tolbert; Fei Fred Wang; Zhenxian Liang; Daniel J. Costinett; Benjamin J. Blalock
    2015 IEEE International Workshop on Integrated Power Packaging (IWIPP)
    2015

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    A board-level integrated silicon carbide (SiC) MOSFET power module is developed in this work for high temperature and high power density applications. Specifically, a silicon-on-insulator (SOI) based gate driver is designed, fabricated and tested at different switching frequencies and temperatures. Also, utilizing high temperature packaging technologies, a 1200 V / 100 A SiC MOSFET phase-leg power module is built. The switching performance of the fabricated power module is fully evaluated at different temperatures up to 225 °C. Moreover, a buck converter prototype incorporating the SOI gate driver and SiC power module is built for high temperature continuous operation. The converter is operated within a wide range from 10 kHz to 100 kHz, with its junction temperature monitored by a thermo-sensitive electrical parameter (TSEP). The experimental results demonstrate that the integrated power module is able to operate at a junction temperature greater of 232 °C.

  • Bo Liu; Sheng Zheng; Yiwei Ma; Fred Wang; Leon M. Tolbert
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    An ultra-wide-area transmission network emulator, also called hardware test-bed (HTB), is being developed to emulate the large-scale interconnected power systems by using regenerative converters. Ac transmission line emulator is a key component in this system to connect two-area grid and to study the ac system's behavior under different scenarios. In this paper, two generic approaches of emulating the ac transmission line are developed based on back-to-back (BTB) voltage source converters (VSC), corresponding to the phasor domain model and discrete time domain model respectively. Two control schemes are presented, both showing less dependency on the communication speed and digital delay, thus enabling high accuracy and the possibility to emulate the dynamics of ac line flow. The impacts of BTB converter losses on the emulation performance are also analyzed, and the corresponding solution is provided. Finally, simulation and experimental results obtained from a scale-down three-phase prototype well verify the modeling and control scheme of the ac line emulation under normal operation and tripping line scenarios.

  • Xiaojie Shi; Bo Liu; Zhiqiang Wang; Yalong Li; Leon M. Tolbert; Fred Wang
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    Due to modularity and high efficiency, modular multilevel converter (MMC) has become a promising topology in high-voltage direct-current (HVDC) transmission systems. However, because of its distributed capacitors, a special capacitor charging process is required in some applications to avoid large inrush arm current. To deal with this issue, the charging loops and associated equivalent circuit of MMC based inverter during uncontrolled pre-charge period are analyzed in this paper, with special focus on the necessity of additional capacitor charging schemes. Moreover, the small signal model of the capacitor charging loop is first derived according to the internal dynamics of the MMC inverter. Based on this model, design considerations of the averaging capacitor voltage control are supplied in detail, which indicates a poor dynamic response of such control due to the resonance among arm inductance and submodule capacitances. To address this problem, a novel feedforward capacitor voltage control is proposed, which can cooperate with the averaging control to obtain enhanced dynamic response and system stability without sacrificing voltage control precision. Simulation and experimental results from a MMC inverter under different load conditions are provided to support the theoretical analysis and proposed control scheme.

  • Zheyu Zhang; Zhiqiang Wang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    2015 IEEE International Workshop on Integrated Power Packaging (IWIPP)
    2015

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    High reliability of semiconductor power devices is one of the key design objectives for power conversion systems. Fast switching SiC devices are susceptible to cross-talk, and these devices also have limited over-current capability. Both of these issues significantly threaten the reliable operation of SiC-based voltage source converters. This paper proposes two gate assist circuits capable of suppressing cross-talk and preventing shoot-through faults to promote the reliable use of SiC devices within a voltage source converter. Experimental results and detailed analysis are presented to verify the feasibility of the proposed approach.

  • Yiwei Ma; Liu Yang; Fred Wang; Leon M. Tolbert
    2015 IEEE Energy Conversion Congress and Exposition (ECCE)
    2015

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    Short circuit fault emulation is an important capability for power converter based grid emulator. This paper proposes to use a shunt connected voltage source converter to emulate short circuit faults, including single-line-to-ground, double-line-to-ground, line-to-line, and three-phase faults. The operating principle and hardware requirements are discussed first, and control strategies for each type of fault are presented. Simulation and experiments are performed to demonstrate the performances of the fault emulator under various circumstances and validate the effectiveness.

  • Yalong Li; Xiaojie Shi; Bo Liu; Fred Wang; Leon M. Tolbert; Wanjun Lei
    2015 IEEE Energy Conversion Congress and Exposition (ECCE)
    2015

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    This paper presents the implementation of a scaled 4-terminal high-voltage direct current (HVDC) test-bed. The hardware construction, control scheme and communication architecture are described. The typical scenarios such as system start-up, station online recommission, power variation, online mode transition and station failure are emulated in the test-bed. A dc line current control is proposed to allow online disconnecting dc lines by using HVDC disconnectors with low current interrupting capability instead of the expensive dc circuit breaker. This control can be further utilized for dc line current limiting function. When a dc line is overloaded, the line current control will be automatically activated to regulate current below the allowable maximum value.

  • Wenchao Cao; Yiwei Ma; Xuan Zhang; Fred Wang
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    This paper proposes a method of sequence impedance measurement of three-phase inverters by using a parallel structure with another inverter as the measurement unit, in order to apply the impedance-based stability analysis of power converter systems. The paralleled inverter not only injects small-signal perturbations but also creates the desired operating conditions for the inverter under test. The measurement setup is simple, since no additional AC source or load banks are needed. First, the sequence impedance model of three-phase inverters is described. Then the measurement setup and injection method are presented. Zero-sequence circulating current reduction and open-loop control with voltage compensation strategies guarantee the measurement accuracy. The agreement between the theoretical analysis and the measurement results in both simulation and experiments verifies the effectiveness of the proposed method.

  • Xuan Zhang; Fred Wang; Wenchao Cao; Yiwei Ma
    2015 IEEE Applied Power Electronics Conference and Exposition (APEC)
    2015

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    In balanced three-phase systems, source impedance and load admittance matrices in the synchronous rotating (d-q) frame can be used to determine system small-signal stability based on the Generalized Nyquist stability Criterion (GNC). For grid-tied inverters, voltage feed-forward control (VFFC) is widely used due to its fast transient dynamics. Through modeling the d-q frame admittances of three-phase grid-tied inverters with voltage feed-forward control, this paper illustrates instability mechanism and proposes some possible solutions. Simulation and experimental results verify the analysis.

  • Weimin Zhang; Ben Guo; Fan Xu; Yutian Cui; Yu Long; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel J. Costinett
    2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
    2014

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    Wide band gap (WBG) power devices, such as Silicon Carbide (SiC) and Gallium Nitride (GaN) devices, have been innovatively applied in the data center power converters, which are based on the high voltage DC (HVDC) power distribution architecture, to evaluate the potential efficiency improvement. For the front-end AC-DC rectifier, a buck rectifier using SiC devices was implemented. The SiC devices were tested at first to obtain the static and switching characteristics. The number of devices in parallel, the switching frequency and the input/output filters were investigated. A prototype of 7.5 kW, 3 phase 480 VAC input, 400 VDC output front-end rectifier was built and tested. The peak efficiency reaches up to 98.55%, and the full load efficiency is 98.54%. For the intermediate DC-DC bus converter, the impact of the GaN devices on the LLC resonant converter efficiency was evaluated and compared with the Si counterparts. Based on the device loss analysis and the FEA simulation on the transformer winding loss, the GaN devices exhibited the reduced device loss, and also the capabilities to reduce the transformer winding loss. A 300 W, 400 VDC input, 12 VDC output GaN device based DC-DC bus converter was built and tested by 96.3% peak efficiency and 96.1% full load efficiency.

  • Zhiqiang Wang; Xiaojie Shi; Leon M. Tolbert; Fred Wang; Zhenxian Liang; Daniel Costinett; Benjamin J. Blalock
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    This paper presents a board-level integrated silicon carbide (SiC) MOSFET power module for high temperature and high power density applications. Specifically, a silicon-on-insulator (SOI) based gate driver capable of operating at 200°C ambient temperature is designed and fabricated. The sourcing and sinking current capability of the gate driver are tested under various ambient temperatures. Also, a 1200 V/100 A SiC MOSFET phase-leg power module is developed utilizing high temperature packaging technologies. The static characteristics, switching performance, and short-circuit behavior of the fabricated power module are fully evaluated at different temperatures. Moreover, a buck converter prototype composed of the SOI gate driver and SiC power module is built for high temperature continuous operation. The converter is operated at different switching frequencies up to 100 kHz, with its junction temperature monitored by a thermo-sensitive electrical parameter (TSEP) and compared with thermal simulation results. The experimental results from the continuous operation demonstrate the high temperature capability of the power module at a junction temperature greater than 225°C.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel Costinett
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    Double pulse test (DPT) is a widely accepted method to evaluate the switching characteristics of semiconductor switches, including SiC devices. However, the observed switching performance of SiC devices in a PWM inverter for induction motor drives (IMD) is almost always worse than the DPT characterization, with slower switching speed, more switching losses, and more serious parasitic ringing. This paper systematically investigates the factors that limit the SiC switching performance from both the motor side and inverter side, including the load characteristics of induction motor/power cable, two more phase-legs for the three-phase PWM inverter as compared to the DPT, and the parasitic capacitive coupling effect between power devices and heat sink. Based on the three-phase PWM inverter with 1200 V SiC MOSFETs, the test results show that the induction motor, especially with a relatively long power cable, will significantly impact the switching performance, leading to switching time increase by a factor of 2, switching loss increase up to 30%, and serious parasitic ringing with 1.5 μs duration as compared to that tested by DPT. In addition, the interactions among the three phase-legs cannot be ignored unless the decoupling capacitors are mounted close to each phase-leg to support the dc bus voltage during switching transients. Also, the coupling capacitance induced by the heat sink equivalently increases the junction capacitance of power devices. However, its influence on the switching behavior in the motor drives is small considering the relatively large capacitance of the motor load.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel Costinett
    2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
    2014

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    This paper focuses on understanding the key impacting factors for switching speed of wide bandgap (WBG) devices in a voltage source converter. First, the constraints and challenges of WBG devices during fast switching transients are summarized. Special attention is given to the transient gate-source and drain-source voltages. Second, the impacts of major components in voltage source converter, including gate drivers, parasitics, inductive loads, and cooling systems, on the switching performance of power devices are systematically investigated. The critical parameters for each component are highlighted. Finally, design criteria are suggested to maximize switching speed of WBG devices.

  • Weimin Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Daniel Costinett
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    Gallium Nitride High Electron Mobility Transistor (GaN HEMT) is an emerging wide band gap power device in recent years. Using a cascoded structure, the GaN HEMT can be combined with a low voltage MOSFET to make the combination behave as a normally-off device. This paper investigates the soft-switching behavior of cascode GaN HEMT in the phase-leg structure. The analysis reveals some internal device behaviors during the soft-switching transition, which are not found in the non-cascode device. Due to the internal feedback of the cascode structure, the channel current of the internal GaN HEMT drops to zero quickly, leading to extremely low turn-off loss. However, it has been found that there are switching energy loss dissipated in the internal GaN HEMT during the turn-on transient, although the external waveforms of the cascode GaN HEMT exhibit zero voltage switching. The fundamental reason is that ratio of the sum of MOSFET output capacitance and internal GaN HEMT input capacitance to the internal GaN HEMT output capacitance is quite low. Based on the simulation, by adding additional capacitance on the gate source terminals of internal GaN HEMT, these losses can be mitigated. Experimental tests using a commercially available GaN device are presented which show nearly 400 mW of loss at 1 MHz switching frequency in four different load current conditions.

  • Zheyu Zhang; Ben Guo; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Zhenxian Liang; Puqi Ning
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    This paper investigates the effects of ringing on the switching losses of wide band-gap (WBG) devices in a phase-leg configuration. An analytical switching loss model considering the parasitic inductance, stray resistance, devices' junction capacitances, and reverse recovery characteristics of the freewheeling diode is derived to identify the switching energy dissipation induced by damping ringing. This part of energy is found to be at most the reverse recovery energy and the energy stored in the parasitics, which is a small portion of the total switching energy. But the parasitic ringing causes interference between two devices in a phase-leg (i.e., cross talk). It is observed that during the turn-on transient of one device, the resonance among parasitics results in high overshoot voltage on the complementary device in a phase-leg. It worsens the cross talk, leading to large shoot-through current and excessive switching losses. The analysis results have been verified by double pulse test with a 1200 V SiC MOSFETs based phase-leg power module.

  • Xiaojie Shi; Zhiqiang Wang; Bo Liu; Yalong Li; Leon M. Tolbert; Fred Wang
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    This paper investigates the prediction of the second order dc voltage ripple in a modular multilevel converter (MMC) based point-to-point high-voltage direct-current (HVDC) system when the rectifier station suffers a single-line-to-ground (SLG) fault. Under this unbalanced condition, the second order dc voltage ripple will transfer to the healthy inverter station and can lead to a potential output voltage distortion. To accurately predict the dc voltage ripple distribution, the equivalent dc side impedances of the MMC inverter station with and without circulating current control are derived separately. It is shown that the MMC inverter station can be regarded as a series connected R-L-C branch in both cases, and the branch values are independent of the adopted current and power control schemes. In addition, long cables with small capacitance and large inductance help to mitigate the voltage ripple in the inverter station. The circulating current control, acting as an active resistance, effectively damps the possible resonance around 120 Hz between the dc cable and the MMC inverter. However, due to the higher equivalent dc impedance, the amplitude of the 2nd order dc voltage ripple in the inverter station is increased. Simulation results from a MMC based HVDC system, and experimental results from a three-phase MMC inverter are provided to support the theoretical analysis.

  • Zheyu Zhang; Ben Guo; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Zhenxian Liang; Puqi Ning
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    Double pulse tester (DPT) is a widely accepted method to evaluate the switching behavior of power devices. Considering the high switching-speed capability of wide band-gap (WBG) devices, the test results become significantly sensitive to the alignment of voltage and current (V-I) measurement. Also, because of the shoot-through current induced by Cdv/dt, during the switching transient of one device, the switching losses of its complementary device in the phase-leg is non-negligible. This paper summarizes the key issues of DPT, including layout design, measurement considerations, grounding effects and data processing. Among them, the latest probes for switching waveform measurement are compared, the methods of V-I alignment are discussed, and the impact of grounding effects induced by probes on switching waveforms are investigated. Also, for the WBG devices in a phase-leg configuration, a practical method is proposed for switching loss evaluation by calculating the difference between the input energy supplied by a dc capacitor and the output energy stored in a load inductor. Based on a phase-leg power module built with 1200 V SiC MOSFETs, the test results show that regardless of V-I timing alignment, this method can accurately indicate the switching losses of both the upper and lower switches by detecting only one switching current.

  • Ben Guo; Fan Xu; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    The overvoltage caused by dc-link inductor current interruption is a serious problem in the current source converters. It becomes an even more challenging issue when the fast-switching SiC MOSFETs are applied as switches in these converters. The protection is required to have nanosecond-level response time to protect the devices. Addressing this challenge, this paper proposes a novel overvoltage protection scheme constituted by a diode bridge and the high-power transient-voltage-suppression (TVS) diodes. It can detect and clamp the overvoltage within less than 50 ns to protect the device from breakdown. When the energy in the inductor is small, it can be dissipated in the TVS diodes. Otherwise, a capacitor in series with a thyristor can be added to absorb the energy. The effectiveness of the protection scheme has been verified by experiments in a 7.5 kW current source rectifier built with SiC MOSFETs.

  • Yiwei Ma; Liu Yang; Jingxin Wang; Fred Wang; Leon M. Tolbert
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    A real-time reconfigurable hardware test-bed is being constructed to emulate a transmission network of a power system by modular regenerative converters. This test-bed enables flexible research scenarios without the necessities of using the actual power system equipment. This paper presents the emulation of a full-converter wind turbine using a single converter in order to investigate the impact of renewable energy penetration. By integrating physical models and control strategies into the converter controller, the emulator can imitate the behaviors of the wind turbine accurately. Simulation and experiments performed in the test-bed validate the effectiveness of the emulation, and demonstrate the performance of the emulated wind turbine during different power system scenarios.

  • Zhenxian Liang; Fred Wang; Leon Tolbert
    2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
    2014

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    A set of packaging technologies has been developed for promotion of SiC power devices in automotive applications. The technical advances include integrating single side cooling, three-dimensional (3-D) planar electrical interconnection, and integrated double sided direct cooling. The further integration of these features into one packaging process has been demonstrated with highly integrated SiC phase leg power module prototypes. The comprehensive improvements in module's electrical, thermal performance and manufacturability help exploit fully the attributes provided exclusively by the wide bandgap (WBG) power semiconductors. The technical advancements lead to cost-effectiveness, high efficiency, high power density power conversion in electric drive system in modern vehicles.

  • Yutian Cui; Fan Xu; Weimin Zhang; Ben Guo; Leon M. Tolbert; Fred Wang; Benjamin J. Blalock; Luke L. Jenkins; Christopher G. Wilson; Jeffrey M. Aggas; Benjamin K. Rhea; Justin D. Moses; Robert N. Dean
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    The energy efficiency of typical data centers is less than 50% because more than half of the power is consumed during power conversion, distribution, cooling, etc. In this paper, a combination of two approaches to improve power supply efficiency is implemented and experimentally verified. One approach uses a high voltage DC architecture, designed to reduce distribution loss and remove unnecessary power conversion stages. The other approach employs wide band gap (WBG) power devices, including silicon carbide (SiC) and gallium nitride (GaN) FETs and diodes, which helps to increase converter efficiency and power density. Scaled down prototypes of all power conversion stages in the data center power supply chain are designed, built, and tested. The advantages of utilizing WBG power devices are illustrated through simulations and then verified by experiment.

  • Yang Xue; Junjie Lu; Zhiqiang Wang; Leon M. Tolbert; Benjamin J. Blalock; Fred Wang
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    In this paper, a compact planar current sensor is developed to be used in active current balancing applications for parallel-connected Silicon Carbide (SiC) MOSFETs. The designed Rogowski coil allows non-intrusive current measurement with low profile, compact size, and high bandwidth. The sensor circuit design extends both lower and higher cutoff frequency of the sensor, and allows a continuous measurement of current waveforms that contain a DC component. The simulated bandwidth of the proposed current sensor is 2.66 Hz-100 MHz. The measured switching waveforms in the experiment are comparable to a 120 MHz commercial current probe.

  • Jing Wang; Liu Yang; Yiwei Ma; Jingxin Wang; Leon M. Tolbert; Fred Wang; Kevin Tomsovic
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    A hardware test-bed platform emulating multiple-area power system scenario dynamics has been established aiming at multiple time-scale emulations. In order to mimic real power flow situation in the system, the load emulators have to behave like real ones in both its static and dynamic characteristics. A constant-impedance, constant-current, and constant-power (ZIP) model has been used for static load type, while a three-phase induction motor model has been built to represent dynamic load types. In this paper, ways of modeling ZIP and induction motor loads and the performance of each load emulator are discussed. A comparison between simulation and experimental results are shown as well for the validation of the emulator behavior.

  • Liu Yang; Yiwei Ma; Jingxin Wang; Jing Wang; Xiaohu Zhang; Leon M. Tolbert; Fred Wang; Kevin Tomsovic
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    A Hardware Test-Bed (HTB) is developed to serve as a platform for power grid emulation. For maximum flexibility, power converters, which can accommodate various control algorithms and behave distinctively based on the applied model and control, is adopted. With the developed emulators, such as generator, load, wind turbine, and PV emulators, diverse research and experiments can be performed by using the HTB. This paper introduces the emulating method, hardware, control and communication structure of the HTB. At the same time, experimental results are compared with simulation to verify the emulation.

  • Yang Xue; Junjie Lu; Zhiqiang Wang; Leon M. Tolbert; Benjamin J. Blalock; Fred Wang
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    Current unbalance in paralleled power electronic devices can affect the performance and reliability of them. In this paper, the factors causing current unbalance in parallel connected silicon carbide (SiC) MOSFETs are analyzed, and the threshold mismatch is identified as the major factor. Then the distribution and temperature dependence of SiC MOSFETs' threshold voltage are studied experimentally. Based on the analysis and study, an active current balancing (ACB) scheme is presented. The scheme directly measures the unbalance current, and eliminates it in closed loop by varying the gate delay to each device. The turn-on and turn-off current unbalance are sensed and independently compensated to yield an optimal performance at both switching transitions. The proposed scheme provides robust compensation of current unbalance in fast-switching wide-band-gap devices while keeping circuit complexity and cost low. The performance of the proposed ACB scheme is verified by both simulation and experimental results.

  • Yutian Cui; Weimin Zhang; Leon M. Tolbert; Fred Wang; Benjamin J. Blalock
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    Energy efficiency of typical data centers is less than 50% where more than half of the power is consumed during power conversion, distribution, cooling, etc. In this paper, a single power stage architecture that converts 400 V to 1 V directly targeting high system efficiency is proposed. A phase shift full bridge (PSFB) DC/DC converter based input series and output parallel structure (ISOP) is selected due to the high input voltage and large output current operation condition. The latest Gallium Nitride (GaN) FETs are implemented in the prototype circuit because of their low output junction capacitance and zero reverse recovery charge. The high frequency planar transformer is designed correspondingly with consideration of GaN FETs on the primary side. A prototype of the PSFB converter is designed, built, and tested. Preliminary experimental results are provided to verify the design.

  • Yu Long; Weimin Zhang; Benjamin Blalock; Leon Tolbert; Fred Wang
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    In this paper, an new configurable low-side resonant gate driver circuit based on 5V CMOS process is presented. This gate driver is designed for current Gallium Nitride (GaN) power transistor working up to 10 MHz switching frequency. By updating driving signals and removing off-chip resonant inductors, this gate driver can be working as a conventional non-resonant gate driver. Under resonant gate driving mode, partial of the gate driving power can be recovered to gate driver power supply. Simulation shows up to 30% of gate driving power dissipation reduction can be achieved while driving a single device compared with conventional push-pull gate drivers. We also try to implement a resonant gate driver in a resonant converter. Simulation also shows a similar gate driver power saving is also achieved in a 48-12V LLC resonant DC-DC converter.

  • Fan Xu; Ben Guo; Zhuxian Xu; Leon M. Tolbert; Fred Wang; Benjamin J. Blalock
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    This paper develops a three-phase front-end power conversion stage for data center power supplies based on 400 Vdc power delivery architecture, which has been proven to have higher efficiency than traditional AC architectures. The front-end stage is based on three paralleled three-phase current source rectifiers, which have several benefits for this application. A control method is introduced for paralleled three-phase current source rectifiers to achieve balanced outputs and individual rectifier module hot-swap, which are required by power supply systems. By using SiC power semiconductors, the power conversion efficiency of the front-end stage is improved and the whole efficiency of the data center power supply system can be further increased.

  • Zhuxian Xu; Weimin Zhang; Fan Xu; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    This paper investigates the fast switching characteristics and high temperature performance of the emerging 600 V GaN high-electron-mobility transistor (HEMT) for high efficiency / high temperature applications. First, the inherent switching performance of the GaN HEMT is demonstrated in the double pulse test. The GaN HEMT exhibits superior switching capability, with a di/dt reaching 9.6 A/ns and dv/dt reaching 140 V/ns. Then, the limitations of the fast switching capability by the device packaging and application circuit are analyzed. The interference between the current and gate through common source inductance limits the inherent switching speed. Packaging and circuit layout with small parasitics is critical in achieving fast switching. Finally, the high temperature static and switching characteristics up to 200 °C are also tested and given. The switching performance of the device is temperature insensitive.

  • Jing Xue; Fred Wang; Ben Guo
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    EMI filter design is often influenced by the noise transformations between the common-mode (CM) and differential-mode (DM), which is mainly due to the system unbalance. In this paper, the analysis of the intrinsic and EMI filter unbalance existing in the EMI noise propagation path of the dc-fed three-phase motor drive system is carried out. CM path unbalance in the circuit model is investigated with an example switching state in three-phase space vector pulse-width-modulation (SVPWM). Noise transformation from CM to DM is then verified with prototype experiments. The influence of the DM filter component unbalance on the DM propagation path is analyzed with simulation. After that, the transformation of the DM noise to CM is validated with tests. Influence of the unbalance and noise mode transformation on the EMI filter design is discussed and a comprehensive design procedure for high density EMI filter is proposed.

  • Yalong Li; Xiaojie Shi; Bo Liu; Fred Wang; Wanjun Lei
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    In a modular multilevel converter (MMC), the circulating current control is usually adopted. It can minimize the circulating current in order to reduce the converter power loss, and also provide an active damping which is beneficial for the converter control stability. The circulating current control is normally implemented by adding a compensating component into the modulation signal. Consequently, the maximum modulation index of the fundamental frequency component will be reduced so as to allow room for circulating current control, and the utilization of dc voltage is reduced. In this paper, the impact of circulating current control on the modulation signal in MMC is investigated. The maximum obtainable modulation index of MMC is theoretically derived. It shows that the modulation index reduction is related to the converter submodule capacitance design. If the capacitance is designed for a maximum 10% voltage ripple, the circulating current control could cause as large as a 5% decrease for the maximum modulation index, or 8% for the case with 3rd harmonic component injection. Both simulation and experimental results verify the theoretical analysis.

  • Wenchao Cao; Yiwei Ma; Jingxin Wang; Fred Wang
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    This paper proposes a virtual series impedance emulation control strategy for current controlled remote PV or wind farms, in order to enhance the power transfer capability of the transmission line. This approach can be regarded as integrating the functions of the FACTS devices, such as series capacitors, into the grid-side converters of PV or wind farms, by utilizing the reactive power capability of the converters. First, the virtual series impedance emulation control strategy for PV or wind farms in both the operation mode with P and Q control and the operation mode with P and V control is described. Then the capability of virtual impedance emulation is analyzed, considering the converter limitations and plant-level limitations. Comparison with physical series capacitors is carried out to investigate the impact of the proposed method on the grid-side converter design. The effectiveness of the proposed methods is verified by both simulation and experiments.

  • Bo Liu; Xiaojie Shi; Fred Wang; Yalong Li
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    Hybrid ac/dc transmission extends the power transfer capacity of existing long ac lines closer to the thermal limit, by superposing dc current onto ac lines through a zigzag transformer. However, this transformer could suffer saturation under unbalanced line impedance conditions. This paper introduces the concept of hybrid line impedance conditioner (HLIC) as an approach to eliminate the line unbalance, which significantly reduces the design cost of the zigzag transformer and could be integrated into the transformer without requiring high voltage insulation. The topology and operation principle are presented, fully utilizing the capability of full bridge converters to generate a hybrid ac/dc voltage as an active impedance compensator. The selection criterion of the line conditioner key components, especially dc link capacitance is also proposed. Simulation and experimental results are provided.

  • Yalong Li; Edward A. Jones; Fred Wang
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    With voltage-balancing control, the voltage difference among sub-module (SM) capacitors in a modular multilevel converter can be reduced. However, this comes at the cost of increased device switching frequency. In this paper, the relationship between the switching frequency and SM capacitor unbalanced voltage is investigated. As the relationship depends on the voltage-balancing control schemes, a popular scheme using a modified sorting method is considered. The switching frequency is found to be inversely proportional to the SM capacitor unbalanced voltage due to the voltage-balancing control and an analytical relationship is derived for the first time. As the SM capacitors voltage-unbalance increases the voltage fluctuation for each SM, the impact of switching frequency on the SM capacitance design is further investigated. The developed analytical relationship can thus be used for the SM capacitance design. Finally, the theoretical analysis is verified by simulation.

  • Yalong Li; Edward A. Jones; Fred Wang
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    This paper investigates the dc link voltage ripple in a modular multilevel converter (MMC). It is found that switching-frequency ripple occurs on the dc link voltage in MMC when circulating current suppressing control is implemented. The mechanism of the switching-frequency voltage ripple is investigated and explained. Circulating current suppressing control will manipulate the average values for the three phaseleg voltages to be equal in order to reduce the low frequency circulating current. However, switching-frequency harmonics appear on the phase-leg voltages as a result, introducing the switching-ripple voltage on the dc link. By modeling the dc link voltage, switching-ripple voltage is derived. Experimental results of a three-phase MMC are presented to verify the theoretical analysis.

  • Bo Liu; Xiaojie Shi; Fred Wang
    2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014
    2014

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    Considering stability, the loadability of long line ac transmission system is typically far below its thermal limitation. To partially address this problem, a hybrid ac/dc approach is investigated in this paper by superposing dc current on ac currents along existing ac lines, and no changes of insulators, towers and conductors are required. First, detailed performance comparison between line commutated converter (LCC) and voltage source converter (VSC) is carried out, which reveals that LCC based bipolar hybrid ac/dc is more suitable in this application due to the controllability of dc fault current on overhead lines. Based on the selected topology, the design methodology of zigzag transformer for dc power injection is proposed, mainly focusing on avoiding dc saturation of magnetic core when ac line impedances are unbalanced. A scaled down prototype is built to demonstrate this design approach and experimental results verify the feasibility of hybrid scheme. Finally, compared to the scheme of converting ac line to pure dc, LCC based hybrid ac/dc can be a much cheaper solution to upgrade HVAC power transfer capacity by 2 times around.

  • Edward A. Jones; Fred Wang; Burak Ozpineci
    2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
    2014

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    Normally-off GaN-on-Si heterojunction field-effect transistors (HFETs) have been developed with up to 650 V blocking capability, fast switching, and low conduction losses in commercial devices. The natively depletion-mode device can be modified to be normally-off using a variety of techniques. For a power electronics engineer accustomed to Si-based converter design, there is inherent benefit to understanding the unique characteristics and challenges that distinguish GaN HFETs from Si MOSFETs. Dynamic Rds-on self-commutated reverse conduction, gate voltage and current requirements, and the effects of very fast switching are explained from an applications perspective. This paper reviews available literature on commercial and near-commercial GaN HFETs, to prepare engineers with Si-based power electronics experience to effectively design GaN-based converters.

  • Ben Guo; Fred Wang; Eddy Aeloiza
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    To reduce the conduction loss, a novel three-phase current source rectifier, named Delta-type Current Source Rectifier (DCSR), has been proposed in previous research. This rectifier has delta-type connection on its input side, and its dc-link current can be shared by multiple devices at a time to reduce up to 20% conduction loss. A high-efficiency modulation scheme for DCSR has been proposed, where the conduction states involve more switches to share the dc-link current. However, it causes current distortion when the input voltages have intersections. In this paper, the phenomenon is analyzed in detail. The clamped voltage on the diode bridge will fluctuate at the voltage intersections, resulting in false current pulse and distortion. An improved modulation scheme is then proposed for DCSR to reduce the input current distortion without sacrificing much efficiency. Through experiment in a 7.5 kW prototype, its effectiveness is verified and the total harmonic distortion (THD) of the input current is reduced dramatically.

  • Ben Guo; Fred Wang; Eddy Aeloiza; Puqi Ning; Zhenxian Liang
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    To reduce the conduction loss, a novel three-phase current source rectifier, named Delta-type Current Source Rectifier (DCSR), has been proposed in previous paper. This rectifier has delta-type connection on its input side, and its dc-link current can be shared by multiple devices at a time to reduce up to 20% conduction loss. The SiC devices are expected to be the next-generation power devices due to their low conduction and switching losses. In this paper, an all-SiC power module is built to realize a high-density DCSR. The switching performance of the power module is characterized under different operation conditions. Then DCSR is compared with the traditional CSR on both switching speed and switching loss. It is shown that the turn-on speed is accelerated and the switching energy is lower in DCSR. The equivalent parasitic inductance is also lower in DCSR with two paralleled minor commutation loops. The switches can operate at higher switching speed without serious resonance in DCSR.

  • Ben Guo; Fred Wang; Eddy Aeloiza
    2014 IEEE Energy Conversion Congress and Exposition (ECCE)
    2014

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    The conduction loss of semiconductor devices is large in traditional three-phase current source rectifiers (CSR). In this paper, a new CSR topology is proposed to reduce the conduction loss. This rectifier, named Delta-type Current Source Rectifier (DCSR), has delta-type connection on its input side and its dc-link current can be shared by multiple devices at a time. Its principle of operation, modulation scheme and design method are discussed in detail in this paper. Based on the analysis, the conduction loss can be reduced by up to 20% with the proposed topology. A 7.5 kW prototype is then built to experimentally verify the performance of DCSR.

  • Zheyu Zhang; Fred Wang
    2014 IEEE Workshop on Wide Bandgap Power Devices and Applications
    2014

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    No power conversion without power semiconductors Power semiconductors is NOTHING without a gate driver! The gate driver will properly drive a power semiconductor and bring the maximum performance. For WBG devices, Driving capability of gate driver IC (rise/fall time, pull-up/pull-down resistance) & CM transient immunity of gate driver isolation are special requirements. The gate driver will protect a power semiconductor and entire converter if something goes wrong. For WBG devices, Cross-talk is easily induced, leading to potential hazard of shoot-through failure and gate terminal reliability issues. A gate assist circuit was introduced for cross-talk suppression. Short circuit capability is limited. The desaturation protection circuit with <; 200 ns response time was described for device reliability enhancement.

  • Xuning Zhang; Dushan Boroyevich; Rolando Burgos; Paolo Mattavelli; Fei Wang
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    This paper presents a comprehensive evaluation of modulation techniques for three-level neutral-point-clamped (NPC) inverters, focusing on the following system aspects: EMI performance, neutral-point voltage ripple, and switching losses. The modulation techniques considered are: nearest three space vectors (NTSV), common-mode reduction (CMR), and common mode elimination (CME). After describing in detail their implementation, an in-depth theoretical analysis on EMI performance is presented based on the space vector sequences employed and the respective space vector dwelling times. Simulation and experimental results in both time and frequency domains are used to verify the techniques and show their effectiveness in terms of EMI noise reduction. An analytical calculation method for the NP voltage ripple is then presented and used to compare the voltage ripple generated by these modulation schemes; experimental results are used to verify the analysis. Lastly, this paper also presents an analytical loss calculation method, which shows that NTSV and CME are comparable in these terms, while CMR can reduce switching losses significantly.

  • Puqi Ning; Zhenxian Liang; Fei Wang
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    A novel packaging structure for medium power modules featuring power semiconductor switches sandwiched between two symmetric substrates that fulfill electrical conduction and insulation functions is presented. Large bonding areas between dies and substrates allow this packaging technology to offer significant improvements in electrical, thermal performance. Double-sided cooling system was dedicatedly analyzed and designed for different applications.

  • Xuning Zhang; Rolando Burgos; Dushan Boroyevich; Paolo Mattavelli; Fei Wang
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    This paper presents a detailed analysis of the impact of “dead time” (DT) on the EMI performance of three-level neutral-point-clamped (3L-NPC) converters using common-mode voltage elimination (CME) modulation, proposing an improved CME modulation method to compensate for this. The implementation method of CME modulation is presented and the benefits and drawbacks are discussed, showing that the benefit of CME modulation is highly related to the DT added to the system, which makes it less practical. The effect of DT on CM voltage generation is then quantified by analyzing the switching states of one phase-leg. This knowledge is used to develop an improved CME modulation method, which has as main feature the proper selection of space vector sequences taking into consideration the current direction of the three phases. This analysis is verified using simulation results and validated using experimental tests conducted with a 2.5 kW 3L-NPC inverter prototype.

  • Xuning Zhang; Paolo Mattavelli; Dushan Boroyevich; Fei Wang
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    This paper presents a systematic design method to select the interleaving angle to reduce the EMI noise in a paralleled three-phase voltage-source converters motor drive system. The EMI noise analysis equivalent circuits for a motor drive system are given and double Fourier integral analysis is used to analyze the impact of interleaving on EMI noise sources. With the consideration of noise propagation path impedance, the design method of interleaving angle selection is analyzed in detail. When system switching frequency and system load and source impedance are determined, the optimal interleaving angle can be calculated based on the system impedance resonant frequency and system switching frequency. Verifications are carried out through both the simulation of a 100kW motor drive system and the experiment on a scale-downed 2kW system. The results show that by using calculated optimal interleaving angle based on the method proposed in this paper, the EMI noise can be reduced by 10~12dB in the impedance resonant frequency range which can reduce the EMI filter size significantly.

  • Xiaojie Shi; Zhiqiang Wang; Yiwei Ma; Lijun Hang; Leon M. Tolbert; Fred Wang
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    An active rectifier with an LCL filter has been proved to be an effective approach to suppress switching harmonic current, guarantee unity power factor, and supply reliable dc voltage in power grids. This paper deals with the modeling and control of an active rectifier with low-volume coupled LCL filter for switching ripple attenuation. Specifically, the equivalent circuit model of three-phase three-column coupled inductors is built taking the variation of coupling coefficient into account. Based on the equivalent circuit, the average model of the active rectifier is derived under abc and dq0 coordinates to design a decoupled controller with excellent steady-state and dynamic performance. In addition, the influences of the coupled LCL filter on current total harmonic distortion (THD) and system stability are investigated under both resistive loads and paralleled inverter loads. Simulation and experimental results from a 30 kVA prototype verify the validity of the proposed model and the effectiveness of the designed controller.

  • Xiaojie Shi; Zhiqiang Wang; Leon M. Tolbert; Fred Wang
    2013 IEEE ECCE Asia Downunder
    2013

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    This paper deals with the system structure and operating principle of a modular multilevel converter (MMC) with integrated arm inductors for improved performance. The proposed integrated inductors provide inductances not only for circulating current suppression, but also for switching ripple mitigation. Compared with the conventional MMC structure implemented with two separate inductors connected in both upper and lower arms by two magnetic cores, only one core is required for the arm inductor of each phase. Hence, the overall size, weight, and cost of magnetic components will be much lower than discrete ones. In addition, the relationships between the number of voltage levels, the equivalent differential inductance of the integrated inductor, and the total harmonic distortion (THD) of the phase voltage is analyzed based on the designed integrated inductor. Without differential inductance, the number of voltage levels should be more than 12 with N+1 phase shift PWM (PSPWM) or 8 with 2N+1 PSPWM to bring the THD below 5 %, while this goal can be achieved by 4 sub-modules MMC with only 2 mH differential mode (DM) inductance if N+1 modulation is applied, or 0.5 mH DM inductance if 2N+1 modulation is adopted. Simulation results for a three-phase inverter system are provided to support the theoretical considerations.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    Silicon Carbide (SiC) power devices have inherent capability for fast switching. However, in a phase-leg configuration, high dv/dt will worsen the interference between the two devices during a switching transient (i.e., cross talk), leading to slower switching speed, excessive switching losses, and overstress of power devices. Unfortunately, due to intrinsic properties, such as low threshold voltage, low maximum allowable negative gate voltage, and large internal gate resistance, SiC power devices are easily affected by cross talk. This paper proposes a novel gate assist circuit using an auxiliary transistor in series with a capacitor to mitigate cross talk. Based on CMF20120D SiC MOSFETs, the experimental results show that the new gate assist circuit is capable of reducing the turn-on switching loss up to 19.3%, and suppress the negative spurious gate voltage within the maximum allowable negative gate voltage without the penalty of further decreasing the device switching speed. Moreover, in comparison to a conventional gate drive with -2 V turn-off gate voltage, this gate assist circuit without negative isolated power supply is more effective in improving the switching behavior of power devices in a phase-leg. The proposed gate assist circuit is a cost-effective solution for cross talk mitigation.

  • Liu Yang; Xiaohu Zhang; Yiwei Ma; Jing Wang; Lijun Hang; Keman Lin; Leon M. Tolbert; Fred Wang; Kevin Tomsovic
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    In this project to develop a reconfigurable electrical grid emulator, a Hardware Test-Bed (HTB) is being developed that emulates large scale power system generators and loads by using power electronic converters. Source converters in the HTB system are designed to emulate power generators. A synchronous generator model is implemented in the converter to calculate the voltage references in the dq axis, and a voltage controller is added to achieve zero steady state error. In the HTB, synchronous generator emulators (SGEs) are connected with each other through transformers and transmission line emulators to form a microgrid. To study the parallel behavior and the stability of the SGEs with voltage controller, a small signal statespace model of the multi SGE system is established, and the eigenvalues are then analyzed. Experiments are conducted in the HTB.

  • Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    In a phase-leg configuration, the high switching-speed performance of silicon carbide (SiC) devices is limited by the interaction between the upper and lower devices during the switching transient (cross talk), leading to additional switching losses and overstress of the power devices. To utilize the full potential of fast SiC devices, this paper proposes a gate assist circuit using two auxiliary transistors and a diode to eliminate cross talk. Based on CMF20120D SiC MOSFETs, the experimental results show that this gate assist methodology is effective to suppress cross talk under different operating conditions, enabling turn-on switching losses reduction by up to 19.6%, and negative spurious gate voltage minimization within the maximum allowable negative gate voltage of the power devices without the penalty of reduced switching speed. Moreover, in comparison to the conventional gate driver with -2 V turn-off gate voltage, this gate assist circuit without a negative isolated power supply is more effective in enhancing the switching behavior of power devices in a phase-leg. Accordingly, the proposed gate assist circuit is a cost-effective solution for cross talk suppression.

  • Ben Guo; Fan Xu; Zheyu Zhang; Zhuxian Xu; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    An overlap time for two commutating switches is necessary to prevent current interruption in a three-phase buck rectifier, but it may cause input current distortion. In this paper, a modified pulse-based compensation method is proposed to compensate for the overlap time. In addition to the traditional method which places the overlap time based on the voltage polarity, this new method first minimizes the overlap time to reduce its effect and then compensates the pulse width according to the sampled voltage and current. It is verified by experiments that the proposed method has better performance than the traditional method, especially when the line-to-line voltage crosses zero. Another distortion comes from the irregular pulse distribution when two sectors change in a 12-sector space vector PWM. This paper proposes two compensation methods for that scenario as well, compensating the duty cycle and increasing switching frequency near the boundaries of two sectors. It is shown through experiments that both methods can reduce the input current distortion in the buck rectifier.

  • Wenchao Cao; Yiwei Ma; Jingxin Wang; Liu Yang; Jing Wang; Fred Wang; Leon M. Tolbert
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    This paper proposes a method of modeling and emulation of a two-stage photovoltaic (PV) inverter system by using a single power converter. The PV emulator is intended to be used in a converter-based power grid emulation system - Hardware Test-bed (HTB), in order to investigate the influence of solar energy sources on the power grid. Both physical components and control strategies of the two-stage PV inverter system are modeled in the converter controller, which enables the emulator to represent the behaviors of the two-stage PV inverter system accurately. The performance of the two-stage PV inverter system emulator in both the MPPT mode and the reserved power control mode under variable solar irradiance circumstances is illustrated by both simulation and experiments in the HTB environment, which verifies the effectiveness of the emulation.

  • Xiaojie Shi; Zhiqiang Wang; Leon M. Tolbert; Fred Wang
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    This paper deals with DC voltage ripple suppression of the modular multilevel converter (MMC) under single-line-to-ground (SLG) fault condition. First, the instantaneous power of a phase unit is derived theoretically according to the equivalent circuit model of the MMC under unbalanced condition, providing a mathematical explanation of the double-line frequency ripple contained in the dc voltage. Moreover, different characteristics of phase current during three possible SLG faults are analyzed and compared. Based on the derivation and analysis, a quasi-PR controller is proposed to suppress the dc voltage ripple. The proposed controller, combining with the negative and/or zero sequence current controllers, could enhance the overall fault-tolerant capability of the MMC under different types of SLG faults. In addition, no extra cost will be introduced given that only DC voltage is required to be detected. Simulation results from a three-phase MMC based rectifier system generated with the Matlab/Simulink software are provided to support the theoretical considerations.

  • Liu Yang; Xiaohu Zhang; Yiwei Ma; Jing Wang; Lijun Hang; Keman Lin; Leon M. Tolbert; Fred Wang; Kevin Tomsovic
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    In this project to develop a reconfigurable electrical grid emulator, a Hardware Test-Bed (HTB) is being developed that emulates large scale power system generators and loads by using power electronic converters. Source converters in the HTB system are designed to emulate generators. A synchronous generator model is implemented in the converter to calculate the voltage references in the dq axis, and a voltage controller is added to achieve zero steady state error. A traditional cascade controller with inner current control and outer voltage control brings additional output impedance to the generator model, and causes voltage tracking error during transients. To minimize the controller output impedance and eliminate controller influence on the generator model, a single voltage loop with current differential feedback is proposed in this paper. Combined with rescaled generator parameters, circulating current elimination, and dead time compensation, simulation and experiments are performed in the HTB. The results verify the effectiveness of the controller and demonstrate the dynamic generator emulator behavior.

  • Jing Wang; Yiwei Ma; Liu Yang; Leon M. Tolbert; Fred Wang
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    A three-phase induction motor emulator using power electronic converters is introduced in this paper. The emulator is intended to be used in an ultra-wide-area grid transmission network emulator represented by regenerative converters structure. The load emulator converter is controlled in rectifier mode to behave like the real induction motor load, whose model is described and programmed in the digital controller. This paper discusses specifically about the induction motor dynamic modeling, numerical method used in the controller, and finally experimental result verification of starting up transient.

  • Yiwei Ma; Liu Yang; Jing Wang; Xiaojie Shi; Fred Wang; Leon M. Tolbert
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    It is a flexible and effective approach to emulate the behaviors of electric power system components using interconnected parallel power converters. The reduction of unnecessary circulating current is essential for the validity of the test-bed system. The types of the circulating current in the test bed system are discussed in this paper. The causes and the reduction strategies for the switching period circulating current, zero sequence circulating current and lower order harmonics are presented. Simulation and experimental results are given to verify the feasibility.

  • Xiaojie Shi; Zhiqiang Wang; Leon M. Tolbert; Fred Wang
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    Modular Multilevel Converter (MMC) has proved to be an effective solution for high power applications, supplying low distorted output voltage and high fault tolerance. This paper presents a detailed performance comparison between phase disposition PWM (PDPWM) and phase shift PWM (PSPWM) schemes under normal condition, over-modulation, as well as carrier non-synchronization condition. Compared to the PSPWM strategy, the PDPWM has smaller line-to-line voltage distortion under normal condition, when the carrier frequencies are adjusted to achieve the same number of switch transitions over one fundamental cycle. In addition, the capacitor voltages are able to keep balanced without additional controllers. Under over-modulation condition, PDPWM can still achieve smaller voltage distortion without capacitor voltage deviation, while obvious voltage differences are observed with PSPWM, which shows an opposite trend toward that of normal condition. Moreover, asynchronous carriers have different impacts on the harmonic cancellation, which needs to be carefully considered in a hardware implementation. Simulation results for a three-phase nine-level inverter system generated with the Matlab/Simulink software are provided to support the theoretical considerations.

  • Weimin Zhang; Zhuxian Xu; Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    In recent years, Si power MOSFET is approaching its performance limits, and Gallium Nitride (GaN) HEMT is getting mature. This paper evaluates the 600 V cascode GaN HEMT performance, and compares it with the state-of-the-art Si CoolMOS in LLC resonant converter. First, the static characterization of 600 V cascode GaN HEMT is described in different temperatures. The switching performance is tested by a double pulse tester to provide the turn-off loss reference to the design of LLC resonant converter. Second, a 400 V-12 V/300 W/1 MHz all-GaN-based converter with the 600 V cascode GaN HEMT is compared with a Si-based converter with the 600 V Si CoolMOS. The device output capacitance is a key factor in the design and loss analysis of LLC resonant converter. The design results show that the total GaN device loss of the all-GaN-based converter can be improved by 42% compared with the total Si device loss. Finally, both 400 V-12 V/300 W/1 MHz Si-based and GaN-based LLC resonant converter prototypes are tested and compared with waveforms and efficiency curves.

  • Weimin Zhang; Yu Long; Yutian Cui; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Stephan Henning; Justin Moses; Robert Dean
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    Transformer loss, comprised of core loss and winding loss, is a critical part in the LLC resonant converter loss. Different winding structures lead to different winding losses and winding capacitances. High winding capacitance will impact the design of the LLC resonant converter. The reason is that high winding capacitance means high winding charge, which must be moved during the dead time to realize the device zero voltage turn-on. As a result, the dead time and magnetizing current will be changed, and the converter loss will be changed as well. This paper first discusses the transformer loss including core loss and winding loss. Then, four different winding structures are analyzed based on a selected core, which show the decrease of AC resistance and the increase of winding capacitance. After that, the winding capacitance model is discussed generally. Finally, the impact of winding capacitance on the design and performance of LLC resonant converter is studied. Two 48 V-12 V, 300 W Si-based and GaN-based LLC resonant converters are designed as platforms to evaluate the impact of winding capacitance. The results indicate that the GaN-based converter is well suited to the transformer with lowest winding loss but highest winding capacitance, since the GaN device's output capacitance is much lower than that of the Si device.

  • Fan Xu; Ben Guo; Zhuxian Xu; Leon M. Tolbert; Fred Wang; Ben J. Blalock
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    Three-phase current source rectifier (CSR) is a promising solution for power supply systems as the buck-type power factor correction converter. By converter paralleling, high power rating and system redundancy can be achieved. However, asymmetrical distribution of load current among converter modules may occur, which can increase power loss or even damage devices. This paper presents the DC-link current control scheme for paralleled current source rectifiers to balance the output currents. Using a master-slave control, the balanced output current distribution and system redundancy are implemented. By correcting zero state duration based on modulation scheme, the circulating current is suppressed without introducing additional power losses, and both positive and negative DC-link currents are balanced.

  • Fan Xu; Ben Guo; Zhuxian Xu; Leon M. Tolbert; Fred Wang; Ben J. Blalock
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    This paper develops a liquid cooled high efficiency three-phase current source rectifier (CSR) for data center power supplies based on 400 Vdc architecture, using SiC MOSFETs and Schottky diodes. The 98.54% efficiency is achieved at full load. The rectifiers are paralleled to achieve high power ratings and system redundancy. The current balance and hot-swap of paralleled CSRs are realized in simulation using master-slave control. Moreover, an improved modulation scheme through adjustment of the freewheeling state is proposed and verified to effectively suppress the circulating current.

  • Yang Xue; Junjie Lu; Zhiqiang Wang; Leon M. Tolbert; Benjamin J. Blalock; Fred Wang
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    In high power applications of silicon carbide (SiC) MOSFETs where parallelism is employed, current unbalance can occur and affect the performance and reliability of the power devices. In this paper, factors which cause current unbalance in these devices are analyzed. Among them, the threshold voltage mismatch is identified as a major factor for dynamic current unbalance. The threshold distribution of SiC MOSFETs is investigated, and its effect on current balance is studied in experiments. Based on these analyses, an active current balancing scheme is proposed. It is able to sense the unbalanced current and eliminate it by actively controlling the gate drive signal to each device. The features of fine time resolution and low complexity make this scheme attractive to a wide variety of wide-band-gap device applications. Experimental and simulation results verify the feasibility and effectiveness of the proposed scheme.

  • Zhuxian Xu; Fan Xu; Dong Jiang; Wenchao Cao; Fred Wang
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    This paper presents a 30 kW Si IGBT based three-phase traction inverter for operating at the junction temperature of 200°C with the reduced cooling and improved efficiency in hybrid electric vehicle (HEV) applications. The high temperature capable Si devices based module is developed for operation with the 105°C high temperature engine coolant, leading to lower cost and higher power density. A variable switching frequency pulse width modulation (VSFPWM) scheme is employed to relieve the negative effect of high temperature on loss. The experimental results demonstrate that the three-phase converter can operate continuously with the 105°C high temperature coolant. The efficiency is increased from 94.98 % to 95.73 % after VSFPWM is applied at full load.

  • Zhuxian Xu; Fan Xu; Puqi Ning; Fred Wang
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    This paper presents a 30 kW Si IGBT based three-phase converter for operating at the junction temperature of 200 °C with the high temperature coolant in hybrid electric vehicle applications. First, the Si IGBT phase-leg module is developed for 200 °C operation utilizing high temperature packaging technologies. Then the thermal management system utilizing the integrated pin fin baseplate is adopted to allow improved thermal performance. Afterward, the short circuit current is employed as the temperature sensitive parameter for junction temperature measurement during converter operation. Finally, a 30 kW three-phase converter is implemented. The experimental results demonstrate that the three-phase converter can operate at the junction temperature of 200 °C with the 105 °C high temperature coolant, thus eliminating the need for the additional 65 °C coolant in HEV.

  • Jing Xue; Fred Wang
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    High density filter design for electromagnetic interference (EMI) noises is essential for the variable speed motor drive system in modern transportation applications. As often being one of the major causes of bulky and heavy filter designs, the mixed-mode (MM) noise phenomenon in the three-phase motor drive system is discussed in this paper. The generation schemes of the MM noises on both DC and AC sides of the system are analyzed. According to the three-phase voltage vector modulation, the MM noises at different switching conditions are compared and summarized. Based on experimental results from a specified prototype system, the existence of the MM noises and its impact on EMI filter design is verified. Investigations show that the implementation of both CM filter and balancing X-capacitors can help attenuate the MM noises effectively.

  • Ben Guo; Fred Wang; Rolando Burgos; Eddy Aeloiza
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    In the three-phase buck-type rectifier, the current on the dc-link inductor becomes discontinuous under light load condition, at which point the current ripple is larger than the dc current value. Traditional control algorithms and modulation schemes do not work consistently well in discontinuous current mode (DCM), causing input current distortion and output voltage ripple. In this paper, the three-phase buck-type rectifier is modeled and analyzed in DCM. The DCM transfer function is derived and compared with the one for continuous current mode (CCM). It is shown that the pole and gain of the DCM transfer function changes significantly compared to that of CCM. A new modulation scheme for DCM is then proposed, which places the space vectors in such way to keep the dc-link current continuous during the active states. A digital controller is then used to eliminate the sampling error caused by the large current ripple, successfully controlling the rectifier in DCM. Simulation and experimental results are used to verify that the input current distortion and the output voltage ripple are dramatically reduced under the proposed DCM modulation and control strategy.

  • Siyao Jiang; Weimin Zhang; Bo Liu; Fred Wang
    2013 IEEE Energy Conversion Congress and Exposition
    2013

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    The desired working condition for the unregulated LLC resonant converter is to have the switching frequency equal to the resonant frequency in order to achieve higher efficiency. However, since the converter works in open-loop condition, the switching frequency usually deviates from the resonant frequency in real converter prototype. In this paper, a novel switching frequency control scheme to track the resonant frequency is proposed. Theoretically, the primary side current of LLC resonant converter is a pure sinusoidal waveform when it works at resonant frequency. The proposed control algorithm is based on tracking the minimum value of the total resonant current harmonic to realize the switching frequency tracking the resonant frequency. A closed-loop digital controller is presented to calculate the total resonant current harmonic to estimate the shape of the waveform. The switching frequency can be well controlled to track the resonant frequency. As a result, the higher efficiency can be achieved.

  • Xuning Zhang; Dushan Boroyevich; Rolando Burgos; Paolo Mattavelli; Fred Wang
    2013 IEEE ECCE Asia Downunder
    2013

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    This paper presents a detailed analysis on the impact of dead time (DT) on the EMI performance of three-level neutral-point-clamping (3L-NPC) inverters with Common Mode Elimination (CME) modulation. The implementation method of CME modulation is presented and the benefits and drawbacks are discussed which shows that the benefit of CME modulation is highly related with the DT added to the system and make it less practical in a real system. By analyzing the switching states of one phase leg, the impacts of DT on CM voltage are discussed in detail. Based on this analysis, a DT compensation method for CME modulations is proposed, where the position of the compensated pulses need to be considered carefully to achieve both CM voltage reduction and the current distortion minimization. Both simulation and experimental verification are implemented to verify the analysis based on a 2.5 kW prototype and the results match well with the analysis and verify the proposed method.

  • Jing Xue; Fred Wang; Wenjie Chen
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    High density electromagnetic interference (EMI) filter design, especially on conducted common-mode (CM) noise emission suppression, is essential for variable speed motor drive system in modern transportation applications. As an alternative of the conventional inverter-end (IE) EMI filter, this paper discusses the possibility of implementing an EMI filter on the motor end for the CM noise attenuation. A functional comparison between the inverter and the motor-end CM filter is firstly carried out, concerning the CM noise propagation path in the DC-fed motor drive system. According to their features in the noise propagation, the authors focus on two typical kinds of motor-end CM filters in detail, namely the motor front-end (MFE) filter and the motor chassis-end (MCE) filter. Their performances on improving the output CM impedance and suppressing the CM noise emission are analyzed, based on experimental results from a specified prototype system. Investigations show that the implementation of the MFE filter has similar functions with the IE CM choke, while attaching the MCE filter with the motor can help save the magnetic size and weight from the conventional IE filter. However, special attentions are needed for the safety and parasitic concerns.

  • Yalong Li; Fred Wang
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    With circulating current suppressing control, the dominating second-order circulating current in a modular multilevel converter (MMC) can be effectively decreased, and the arm inductance requirement based on the circulating current is thus largely reduced. This paper investigates the extent to which the arm inductance can be reduced. The circulating current at switching frequency is first explored, which is found to be a limitation for arm inductance selection when the circulating current suppressing control is implemented. The theoretical relationship between switching frequency circulating current and arm inductance is further deduced, and the arm inductance selection principle is proposed. Finally, the theoretical analysis is verified by the experiment.

  • Wenchao Cao; Fred Wang; Dong Jiang
    2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2013

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    In order to reduce the inverter switching loss and system noise of electric vehicle (EV) and hybrid electric vehicle (HEV) motor drives operating in high output torque region, while preventing over-heating and demagnetization of the electric motor, this paper proposes variable switching frequency PWM (VSFPWM) strategies based on on-line prediction of current ripple RMS value for two typical motor drive systems of EV/HEV. First, the instantaneous output current ripple of three-phase inverter with SVPWM is analyzed in the time-domain. Then the current ripple prediction based VSFPWM strategies are proposed for both traction motor drive topologies to meet the current ripple RMS value requirement. Compared with constant switching frequency PWM (CSFPWM) method, the inverter switching loss and noise reduction capabilities of the proposed VSFPWM methods are analyzed. The effectiveness of the proposed methods is verified by both simulation and experiments.

  • Xuning Zhang; Dushan Boroyevich; Paolo Mattavelli; Fred Wang
    Proceedings of The 7th International Power Electronics and Motion Control Conference
    2012

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    This work proposes a frequency-domain EMI prediction model for common mode (CM) and differential mode (DM) noises for the purpose of designing EMI filters before the system construction. The parameters in the model can be extracted from system detail switching model or measured from the real system. The Double Fourier Integral Transformation (DFIT) method is used to calculate the noise sources in the model. When the system topology modulation method and modulation index is fixed, the system EMI noise can be predicted from the calculation of the equivalent model. Verifications are carried out through simulation and experiment system by comparing the calculated EMI spectrums and simulated and measured EMI spectrums. Based on the proposed model, this paper also proves that the resonances in EMI noise propagation path will have a significant impact on the EMI filter design for DC fed motor drive system with long cables.

  • Zheyu Zhang; Weimin Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock
    2012 IEEE Energy Conversion Congress and Exposition (ECCE)
    2012

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    Advanced power semiconductor devices, especially wide band-gap devices, have inherent capability for fast switching. However, due to the limitation of gate driver capability and the interaction between two devices in a phase-leg during switching transient (cross talk), the switching speed is slower than expected in practical use. This paper focuses on identifying the key limiting factors for switching speed. The results provide the basis for improving gate drivers, eliminating interference, and boosting switching speed. Based on the EPC2001 Gallium Nitride transistor, both simulation and experimental results verify that the limiting factors in the gate loop include the pull-up (-down) resistance of gate driver, rise (fall) time and amplitude of gate driver output voltage; among these the rise (fall) time plays the primary role. Another important limiting factor of device switching speed is the spurious gate voltage induced by cross talk between two switches in a phase-leg. This induced gate voltage is not only determined by the switch speed, but also depends on the gate loop impedance, junction capacitance, and operating conditions of the complementary device.

  • Jing Wang; Liu Yang; Yiwei Ma; Xiaojie Shi; Xiaohu Zhang; Lijun Hang; Keman Lin; Leon M. Tolbert; Fred Wang; Kevin Tomsovic
    2012 IEEE Energy Conversion Congress and Exposition (ECCE)
    2012

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    An ultra-wide-area transmission network emulator represented by regenerative converters is developed in this paper. The converters are paralleled to provide and share power similar to electromechanical generators. Others are controlled to emulate loads, such as, induction motors and constant impedance, current, power (ZIP) loads. The structure and control algorithms of these power system component emulators are discussed in detail, and the performance of overall system architecture is presented. As is well-known, the induction motor will induce large power perturbation when it starts. The simulation results clearly show the dynamic response and starting up process of the load.

  • Weimin Zhang; Yu Long; Zheyu Zhang; Fred Wang; Leon M. Tolbert; Benjamin J. Blalock; Stephan Henning; Chris Wilson; Robert Dean
    2012 IEEE Energy Conversion Congress and Exposition (ECCE)
    2012

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    Silicon Power MOSFETs, with more than thirty years of development, are widely accepted and applied in power converters. Gallium Nitride (GaN) power devices are commercially available in recent years [1], but the device performance and application have not been fully developed. In this paper, GaN devices are compared with state-of-art Si devices to evaluate the device impact on soft-switching DC-DC converters, like LLC resonant converter. The analytical approach of device selection and comparison are conducted and loss related device parameters are derived. Total device losses are compared between Si and GaN based on these parameters. GaN shows less loss compared with Si, yielding approximately a 20% reduction of total device loss. Two 300 W, 500 kHz, 48 V-12 V GaN-based and Si-based converter prototypes are built and tested. Since the body diode forward voltage drop of GaN device is high, the dead time is adjusted to minimize the body diode conduction period. The peak efficiency of the GaN-based converter is 97.5%, and the full load efficiency is 96.1%, which is around 0.3% higher than the Si-based converter at full load. The test results shows that, although GaN device has lower loss, the improvement of converter efficiency is not much. The reason is that the transformer loss accounts for more than 60% of total loss. Therefore, a transformer which fits the GaN device characteristic need to be further investigated.

  • Fan Xu; Ben Guo; Leon M. Tolbert; Fred Wang; Ben J. Blalock
    2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2012

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    This paper presents the characteristics of a 1200 V, 33 A SiC MOSFET and a 1200 V, 60 A SiC schottky barrier diode (SBD). The switching characteristics of the devices are tested by a double pulse test (DPT) based on a current-source structure at voltage levels up to 680 V and current up to 20 A. In addition, based on these devices, a 7.5 kW, three-phase buck rectifier for a 400 Vdc architecture data center power supply is designed. The total loss of this rectifier is calculated full load. The results show that the SiC based buck rectifier can obtain low power loss and smaller weight and volume than a Si based rectifier.

  • Fan Xu; Ben Guo; Leon M. Tolbert; Fred Wang; Benjamin J. Blalock
    2012 IEEE Energy Conversion Congress and Exposition (ECCE)
    2012

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    This paper presents a 7.5 kW liquid cooled three-phase buck rectifier which will be used as the front-end rectifier in 400 Vdc architecture data center power supply systems. SiC MOSFETs and SiC Schottky barrier diodes (SBDs) are used in parallel to obtain low power semiconductor losses. Input and output filters are designed and inductor core material is compared to reduce passive component losses. A low-loss modulation scheme and 28 kHz switching frequency are selected to optimize the converter design for efficiency. A prototype of the proposed rectifier is constructed and tested, and greater than 98.5% efficiency is obtained at full load.

  • Jing Xue; Fred Wang; Xuning Zhang; Dushan Boroyevich; Paolo Mattavelli
    2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2012

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    This paper focuses on the conducted electromagnetic interference (EMI) noise suppression solution at the ac output terminal of PWM motor drives. Dc-fed voltage source inverter (VSI) is selected as one typical topology. A practical output EMI filter design procedure is proposed. To ensure design accuracy, the procedure includes the system impedance characterization with offline measurement. Meanwhile, different damping methods are studied to avoid oscillation introduced by EMI filters. Prototype experimental results have verified the feasibility of the design procedure for both common-mode (CM) and differential-mode (DM) EMI noise suppression.

  • Zhuxian Xu; Fred Wang; Puqi Ning
    2012 IEEE Energy Conversion Congress and Exposition (ECCE)
    2012

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    In this paper, a method is proposed to measure the junction temperatures of IGBT discrete devices and modules using short circuit current. Experimental results show that the short circuit current has good sensitivity, linearity and selectivity, which is suitable to be used as temperature sensitive electrical parameters (TSEP). Test circuit and hardware design are proposed for junction temperature measurement in single phase and three phase converters. By connecting a temperature measurement unit to the converter and giving a short circuit pulse, the IGBT junction temperature can be measured.

  • Zhuxian Xu; Dong Jiang; Ming Li; Puqi Ning; Fred Wang; Zhenxian Liang
    2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2012

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    A Si IGBT phase-leg module is designed and fabricated for operating at 200 °C in hybrid electrical vehicle (HEV) applications. First, a phase-leg package design is given including die selection, material selection, and layout design. Then the static and switching characterization of the fabricated module is conducted at various temperatures. The losses for a kW phase-leg in three-phase motor drive are calculated based on the characterization. Thermal performance of the proposed package and cooling is then evaluated with both (finite element analysis) FEA simulation and experiments. The simulation and experimental results agree well, which show that the proposed packaging design and cooling approach can maintain the Si IGBT junction temperature below 200 °C with 105 °C coolant. Finally, a buck converter composed of the phase-leg module is operated successfully with the device junction temperature heated up to 200 °C, which demonstrates the high temperature operation ability of the designed package module.

  • Zhuxian Xu; Fred Wang
    2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2012

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    This paper investigates the short-circuit capability and the failure mechanisms of Si trench gate field-stop IGBT under high temperature operation conditions through experiments. First, the test circuits are proposed for IGBT short circuit capability evaluation in different types of short circuit conditions. A hardware setup is built accordingly, and used to evaluate experimentally the IGBT short circuit failures caused by thermal destruction, thermal runaway and latch-up at both 25°C and 200°C. The critical short circuit time is given for high temperature operation under different short circuit conditions. The experimental results show that although the critical short circuit time is reduced at 200°C operation, it is still adequate for the protection circuit to shut down the devices safely. The Si trench gate field-stop IGBT exhibits good short circuit ruggedness at 200°C operation.

  • Ben Guo; Fred Wang; Rolando Burgos
    2012 IEEE Energy Conversion Congress and Exposition (ECCE)
    2012

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    The three-phase buck-type rectifier has advantages as front-end converter for high efficiency power supplies in telecommunication and data centers. In this paper, the different commutation types of a three-phase buck rectifier with a freewheeling diode are analyzed through experiments using different semiconductor devices. Further, the switching loss of the converter is modeled and calculated for four space vector modulation schemes. It is shown that when the switches include minority carrier devices, such as Si PiN diode, IGBT and Reverse Blocking IGBT (RB-IGBT), more switching loss will occur in the commutation between two switches than between a switch and the freewheeling diode. This difference can be reduced if majority carrier devices, such as SiC Schottky diodes, are used in series with the switches. The modulator can be arranged to eliminate the specific transition which has the most switching loss. According to the analysis, each modulation scheme has its own field for high efficiency application. The advantageous modulation scheme is given for different device combinations in this paper.

  • Jing Xue; Fred Wang
    2012 IEEE Energy Conversion Congress and Exposition (ECCE)
    2012

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    Single and three-phase common-mode (CM) inductors play a vital role in conductive CM noise suppression for motor drive system. In this paper, the CM conductive noise propagation path in the dc-fed motor drive system is analyzed. One measurement-based characterization method is discussed for determining the noise propagation path. Meanwhile, modeling methods for the impedance of both single and three-phase CM inductors are reviewed and verified experimentally. With the CM inductor impedance model and CM propagation path characterization, the suppression of both DC and AC CM noise is accurately predicted to be within a 5 dBμA design margin from 10 kHz to 30 MHz. Based on the modeling and verification, this paper also proposes a practical method for high density CM inductors design using MATLAB Optimization Toolbox®.

  • Puqi Ning; Khai Ngo; Fred Wang
    2011 IEEE Energy Conversion Congress and Exposition
    2011

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    This study confirms that high stresses between the metallization layer and ceramic lead to significant failures in DBC substrate. The driving forces behind several different failure modes are discussed. Further understanding of these failure mechanisms enables the modules to be engineered for longtime operation and helps to enhance the reliability of system-level operation.

  • Di Zhang; Puqi Ning; Dushan Boroyevich; Fred Wang; Rolando Burgos; Kamiar Karimi; Vikram Immanuel; Eugene Solodovnik
    2011 IEEE Energy Conversion Congress and Exposition
    2011

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    With interleaving, DPWM and SiC semiconductors, the design of a 15 kW high power density three-phase ac-dc rectifier is presented. The development of main passive components, main active components, and the system are reported in detail. With the presented technologies, the specific power density can be pushed to more than 2kW/lb.

  • Di Zhang; Fred Wang; Rolando Burgos; Dushan Boroyevich
    2011 IEEE Energy Conversion Congress and Exposition
    2011

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    This paper presents the use of inter-phase interleaving for three-phase voltage source converter (VSC). With the proposed inter-phase interleaving, the output three-phase voltages can be balanced even though low non-triple carrier ratios, such as 5 or 7, are used for the VSC. First, the impacts of sideband harmonic components on the fundamental component are analyzed in detail. The validity of analysis is demonstrated by the explanation of beat phenomenon related to non-integer carrier ratio. Based on the analysis, the unbalance issue of output voltages due to non-triple carrier ratio is explained. After that, the inter-phase interleaving control method is proposed to correct such unbalance. With this control method, the output voltages are balanced even with non-triple carrier ratios. The corresponding penalty of potential higher current THD is also discussed in detail. The analysis and control method can be applied to both two-level and multi-level converters. Experimental results verify the analysis and the feasibility of the proposed control method.

  • Puqi Ning; Fred Wang; Khai D. T. Ngo
    2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2011

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    Taking full advantage of SiC devices, a team from Oak Ridge National Laboratory, the University of Tennessee and Virginia Polytechnic Institute and State University have designed, developed, and tested a phase-leg power module based on a high temperature wirebond package. Details of the layout, gate drive, and cooling system designs are described. Continuous power tests confirmed that our design process produced a high density power module that operated successfully at high junction temperatures.

  • Shengnan Li; Leon M. Tolbert; Fred Wang; Fang Zheng Peng
    2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2011

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    This paper proposes a novel packaging method for power electronics modules based on the concepts of P-cell and N-cell. It can reduce the stray inductance in the current commutation path in a phase-leg module and hence improve the switching behavior. Two IGBT phase-leg modules, specifically a P-cell and N-cell based module and a conventional module are designed. Using Ansoft Q3D Extractor, electromagnetic simulation is carried out to extract the stray inductance from the two modules. Switching behavior with different package parasitics is studied based on Saber simulation. Two prototype phase-leg modules based on two different designs are fabricated. The parasitics are measured using a precision impedance analyzer. The measurement results agree with the simulation very well.

  • Mithat C. Kisacikoglu; Burak Ozpineci; Leon M. Tolbert; Fred Wang
    2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2011

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    Vehicle to grid (V2G) power transfer has been under research for more than a decade because of the large energy reserve of an electric vehicle battery and the potential of thousands of these connected to the grid. In this study a complete analysis of the front end inverter of a non-isolated bidirectional EV/PHEV charger capable of V2G reactive power compensation is presented.

  • Fan Xu; Dong Jiang; Jing Wang; Fred Wang; Leon M. Tolbert; Timothy J. Han; Sung Joon Kim
    2011 IEEE Energy Conversion Congress and Exposition
    2011

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    This paper presents a SiC JFET-based, 200°C, 50 kW three-phase inverter module and evaluates its electrical performance. With 1200 V, 100 A rating of the module, each switching element is composed of four paralleled SiC JFETs with two anti-parallel SiC Shottky Barrier Diodes (SBDs). The substrate layout inside the module is designed to reduce package parasitics. Then, experimental static characteristics of the module are obtained over a wide range of temperature, and low on-state resistance is shown up to 200°C. The dynamic performance of this module is evaluated by double pulse test up to 150°C, under 650 V dc bus voltage and 60 A drain current, with different turn-on and turn-off gate resistances. The current unbalance phenomenon and phase-leg shoot-through problem are analyzed too. The results by simulation and experiments show that the causes of shoot-through are JFET inside parameters, package parasitics, and high temperature. The switching losses of this module at different temperatures are shown at the end.

  • Fan Xu; Dong Jiang; Jing Wang; Fred Wang; Leon M. Tolbert; Timothy Junghee Han; Jim Nagashima; Sung Joon Kim
    8th International Conference on Power Electronics - ECCE Asia
    2011

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    Research on silicon carbide (SiC) power electronics has shown their advantages in high temperature and high efficiency applications. This paper presents a SiC JFET based, 200°C, 50 kW three-phase inverter module and evaluates its electrical performance. With 1200 V, 100 A rating of the module, each switching element is composed of four paralleled SiC JFETs (1200 V/25 A each) and two anti parallel SiC Shottky Barrier Diodes (SBDs). The substrate layout inside the module is designed to reduce package parasitics. Then, experimental static characteristics of the module are obtained over a wide range of temperature, and low on-state resistance is shown up to 200°C. A gate driver, with different turn-on, turn-off gate resistances and RCD network, is designed to optimize the switching performances. The module is verified to have low power loss, fast switching characteristics at 650 V dc bus voltage, 60 A drain current, in both simulation and experiments. Finally, switching time and losses, obtained from simulation and experiment, are compared.

  • Dong Jiang; Fan Xu; Fei Wang; Leon M. Tolbert; Timothy J. Han; Sung Joon Kim
    2011 IEEE Energy Conversion Congress and Exposition
    2011

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    This paper studies the performance of a newly designed 1200V/60A three-phase SiC power module based on parallel SiC JFETs and diodes. The conduction and the switching performance are tested from room temperature to 150°C. The switching speed of the module increases when temperature rises. In the switching performance test, the gate driver speed could bring false peak in turn-off waveform. The experimental results show that the false peak is cause by Differential-mode (DM) noises but not Common-mode (CM) noises. Finally the losses and efficiency of this power module are evaluated.

  • Fang Luo; Xuning Zhang; Dushan Boroyevich; Paolo Mattevelli; Jing Xue; Fred Wang; Nicolas Gazel
    2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2011

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    This paper discusses EMI filter design methodology for DC-fed three-phase motor drive system. An analysis of noise source and propagation path impedances of motor drive systems is conducted, a new filter design model for both AC side and DC side filter is proposed based on the impedance mismatching between the EMI filter impedances and noise source/load impedances. Using this model, the in circuit attenuation of EMI filter can be accurately predicted. The interaction between AC and DC filters is also studied in this analysis. By applying some constraint, EMI filters can be designed. This new design procedure is suitable for both DC and AC side EMI filters. Simulation and experimental results give a firm support to the proposed method.

  • Puqi Ning; Fred Wang; Dong Jiang; Di Zhang; Rixin Lai; Dushan Boroyevich; Khai Ngo; Rolando Burgos; Kamiar Karimi; Vikram Immanuel; Eugene Solodovnik
    2011 IEEE Energy Conversion Congress and Exposition
    2011

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    This paper presents the development and experimental performance of a 10 kW, all SiC, 250°C junction temperature high-power-density three-phase ac-dc-ac converter. The electromagnetic interference filter, thermal system, high temperature package, and gate drive design are discussed in detail. Finally, tests confirming the feasibility and validating the theoretical basis of the prototype converter system are described.

  • Dong Jiang; Jing Xue; Fred Wang; Min H. Kao
    2011 IEEE Electric Ship Technologies Symposium
    2011

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    This paper proposes a new Modular Multilevel Cascade Converter (MMCC) topology for future high density medium-voltage motor drive. The proposed topology utilizes the active ripple energy storage method for rectifier capacitance design. Simulation has been done in this paper and proves that the proposed topology works well, and the active energy storage method can significantly reduce the DC-link capacitor. Power density improvement is quantified for an example system to show the benefits of the proposed topology.

  • Zhuxian Xu; Di Zhang; Fred Wang; Dushan Boroyevich
    2011 Twenty-Sixth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2011

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    This paper presents a unified control method for the combined permanent magnet generator (PMG) and three-phase boost rectifier that can be used in autonomous power systems such as more-electric aircraft requiring high power density. With the unified control, the paper shows the system can function well without additional boost inductors. The design procedure for the control is presented, including current loops, voltage loop, reactive power loop and rotor position estimator loop. Simulation and experimental results show that both the DC link voltage and reactive power could be controlled effectively. In addition, the paper proposes a method to optimize the overall system efficiency by appropriate reactive power distribution. The power density and efficiency of the PMG and rectifier system is improved with the unified control.

  • Zhuxian Xu; Ming Li; Fred Wang; Zhenxian Liang
    2011 IEEE Energy Conversion Congress and Exposition
    2011

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    In order to satisfy the high density requirement and harsh thermal conditions in future hybrid vehicles, a systematic study of Si IGBT operating at 200°C is performed to determine its feasibility, issues and application guideline. First, the device forward conduction characteristics, leakage current, and switching performance at various temperatures are evaluated through both analytical and lab evaluation. Based on the device characterization, the loss and thermal study is then performed, which provides the guideline for packaging and cooling design. Finally, the possible failure mechanisms at high temperatures including latching and short circuit fault have been tested to ensure the safe and reliable operation of Si IGBTs.

  • Dong Jiang; Fred Wang
    2011 IEEE Electric Ship Technologies Symposium
    2011

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    SiC devices have obvious advantages comparing with conventional Si devices especially in high temperature range. This paper aims at developing a method of characterization SiC JFET conduction and switching performance in high temperature and calculating the loss of SiC JFET converters. Experimental results show that with SiC Schottky diode as anti-paralleling diode the reverse recovery in switching is improved and switching loss is less. Also, the turn-off time will decrease when the temperature rises, showing a better performance in high temperature. With the test results, the loss estimation method is developed. Then losses of two typical three-phase AC-DC-AC converters are calculated. Experimental results show that with Schottky diode as anti-paralleling diode, both conduction losses and switching losses can be reduced especially at high temperature.

  • Fang Luo; Andrew Carson Baisden; Dushan Boroyevich; Khai Ngo; Fred Wang; Paolo Mattavelli; Luisa Coppola; Nicolas Gazel; Yong Kang
    2010 IEEE Energy Conversion Congress and Exposition
    2010

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    The transmission line busbar filter is a good choice for a high-density EMI containment solution. This paper presents a study of the application of a transmission-line busbar filter in a motor drive system. To examine the potential improvement for busbar filters, low-frequency attenuation and basic modeling of busbar filters in a motor drive are studied. Based on the knowledge gained from the modeling, an improved busbar filter is proposed and fabricated. Experimental results show a significant improvement on busbar filter attenuation.

  • Dushan Boroyevich; Zheng Chen; Fang Luo; Khai Ngo; Puqi Ning; Ruxi Wang; Di Zhang; Fred Wang; Rolando Burgos; Rixin Lai; Shuo Wang
    2010 6th International Conference on Integrated Power Electronics Systems
    2010

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    Over the past ten years, there has been increased incorporation of electronic power processing into alternative, sustainable, and distributed energy sources, as well as energy storage systems, cars, airplanes, ships, homes, data centers, and the power grid. The goals have been to reduce the size, weight, and maintenance and operational costs of these power systems, while increasing overall energy efficiency, safety, and reliability. This paper summarizes some of the authors' research efforts in the last four years on the improvements in power density and physical integration of power converters, mostly for vehicular applications. Several approaches to integration of active components into high-temperature modules are presented together with examples of the evaluation and modeling of 1.2 kV SiC JFET and MOSFET. Possible improvements in the power density through hybrid passive and active integration of an EMI filter and of an energy storage capacitor in single-phase PWM rectifier are also shown. Examples of converter integration for a 10 kW motor drive with active front-end using SiC devices operating at 250°C, and for paralleling three-phase boost rectifiers with interleaved PWM are presented.

  • Dong Jiang; Rixin Lai; Fred Wang; Fang Luo; Shuo Wang; Dushan Boroyevich
    The 2010 International Power Electronics Conference - ECCE ASIA -
    2010

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    The problem of electromagnetic interference (EMI) plays an important role in the design of power electronic converters, especially for airplane electrical systems. This paper explores techniques to reduce EMI noise in three-phase Vienna-type rectifiers. The design approach is using a high-density EMI filter to satisfy the EMI standard. In particular, the cause of high noise at high frequencies is studied in experiments, and the coupling effect of the final stage capacitor and inductors is investigated. The use of random PWM for EMI noise reduction is also presented. The performance of random PWM in a Vienna-type rectifier is verified by theoretical analysis and experimental results. The approaches discussed in this paper significantly reduce the EMI noise in the Vienna-type rectifier, and therefore the filter size can also be reduced.

  • Fang Luo; Shuo Wang; Fred Wang; Dushan Boroyevich; Nicolas Gazel; Yong Kang
    2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2010

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    Common mode (CM) choke saturation is a practical problem in common-mode filter applications. It's generally believed that the leakage inductance of common-mode chokes makes the core saturated. This paper analyzes two new mechanisms for common-mode choke saturation due to common-mode voltage, and these mechanisms are verified in experiment. Common-mode choke saturation is particularly important for motor drive systems, which have a high common-mode voltage and comparably higher stray grounding capacitance. A model is established to describe the relationship between the common-mode voltage and the volume of the common-mode magnetic components. According to the analysis, LISNs (line impedance stabilization networks) play an important role in the design of CM magnetic components.

  • Ruxi Wang; Puqi Ning; Dushan Boroyevich; Milisav Danilovic; Fred Wang; Rajashekara Kaushik
    2010 IEEE Energy Conversion Congress and Exposition
    2010

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    High temperature (HT) converters have become more and more important in industrial applications where the converters will operate in a harsh environment. These environments require the converter to have not only high-temperature semiconductor devices (SiC, GaN) but also high-temperature control electronics. This paper describes a design process for a three-phase PWM rectifier. The SiC JFET planar structure is used for the main semiconductor devices. Other high-temperature components, including the passive components, silicon-on-insulator chips and the auxiliary components are studied and summarized. Finally, a 1.4 kW lab prototype is fabricated and tested for verification.

  • Rixin Lai; Fred Wang; Rolando Burgos; Dushan Boroyevich
    2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2010

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    This paper proposes a new average model and a control approach for the three-phase three-level non-regenerate rectifier (Vienna-type rectifier) with unbalanced dc load. State space analysis is first carried out to achieve the relationship between the voltage unbalance, load conditions and the control duty cycle. With the implementation of an optimum zero-sequence component, a simplified average model for the dc output stage with unbalanced load is obtained. Based on the developed model, a new control approach and the criteria of control parameter selection are presented. The simulation and experiment results validate the proposed control scheme.

  • Di Zhang; Fred Wang; Said El-Barbari; Juan Sabate; Dushan Boroyevich
    2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2010

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    This paper presents an improved asymmetric space vector modulation (ASVM) for two level voltage source converters (VSCs) when the switching frequency is only 9 times of line frequency. By adding two pulses in each line cycle when the fundamental voltage crosses zero, the total harmonic distortion (THD) of output current can be reduced significantly with very limited penalty. The applications of improved ASVM in a single VSC or two interleaved VSCs systems are shown separately. With optimization, the ac current THD can be reduced to as low as 50% for single VSC and even lower to 20% for interleaved VSCs systems. Such THD reduction has close relationship with modulation index and interleaving angle. In addition, improved ASVM can also reduce the amplitude of circulating current which mainly determined the size of inter-phase inductors. Finally, the weights of total inductors needed to meet the same THD requirement are compared to demonstrate the benefits of improved ASVM when different PWM schemes are used. The analysis results are verified by experiments on a demo system.

  • Shengnan Li; Leon M. Tolbert; Fred Wang; Fang Zheng Peng
    2010 IEEE Energy Conversion Congress and Exposition
    2010

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    This paper introduces the concepts of two basic switching cells, P-cell and N-cell, along with their implications in power electronic circuits. The basic switching cells exist in almost every power electronic circuit. To take advantage of these structures, this paper proposes a novel packaging method for power electronics modules. The proposed packaging method uses the basic switching cells as the unit in a module, instead of traditional anti-parallel connection of active switch and diode. This rearrangement can reduce the stray inductance in the current commutation pass; therefore, the performance and reliability of the power device module and the power electronic system can be improved. A conventional phase leg module and a proposed module are modeled. Electromagnetic simulation is carried out to extract the stray inductance from the two modules. Switching behavior under different package parasitics is studied based on Saber simulation.

  • Dong Jiang; Rixin Lai; Fred Wang; Rolando Burgos; Dushan Boroyevich
    2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2010

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    PM motor's speed sensorless control does not work well in the low speed. To avoid this issue, open-loop control is usually used to start the motor, and then it is switched to sensorless close-loop control. The transition between the two control modes can cause a transient during the starting process. This transient can be undesirable especially for motor drives with front-end rectifier and small energy storage components, such as small dc capacitors in the case of voltage source inverter (VSI) drive. This paper studies the principle of dc bus transient in sensorless control start-up process and proposes a method to reduce the oscillation: before closing the sensorless loop, the reference current is adjusted to continuously track the real motor rotor position to the estimated rotor position, and the speed regulator is pre-calculated to generate the q-axis reference current before closing the speed loop. An experiment is conducted using a Vienna-type rectifier and a VSI based motor drive with back-EMF observer based sensorless control on a PM motor. Experimental results show that with the proposed method, the DC bus voltage transient is obviously reduced.

  • Jing Xue; Fred Wang; Dushan Boroyevich; Zhiyu Shen
    2010 IEEE Energy Conversion Congress and Exposition
    2010

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    In this paper, the design and comparison of single and three-phase transformers in Dual Active Bridge (DAB) Converter are carried out. DAB converter topology and operating schemes are introduced. And core-type transformers design optimization methods are proposed for both single and three-phase DAB converters (DAB1 and DAB3). Based on DAB topology assumptions, single and three-phase transformers are compared in volume with various design constraints. And analysis shows that comparison result varies at different cases of flux and thermal limits. Scaled-down DAB1 and DAB3 systems have been built and temperature rises of the transformers have been tested for verification.

  • Ruxi Wang; Fred Wang; Dushan Boroyevich; Puqi Ning
    2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2010

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    It is well known that there exist second-order harmonic current and corresponding ripple voltage on dc bus for single phase PWM rectifiers. The low frequency harmonic current is normally filtered using a bulk capacitor in the bus which results in low power density. This paper proposed an active ripple energy storage method that can effectively reduce the energy storage capacitance. The feed-forward control method and design considerations are provided. Simulation and 15 kW experimental results are provided for verification purposes.

  • Puqi Ning; Fred Wang; Khai Ngo
    2010 IEEE Energy Conversion Congress and Exposition
    2010

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    The layout of power modules is one of the key points in power module design, especially for high power densities, where couplings are increased. In this paper, along with the design example, an automatic design processes by using genetic algorithm are presented. Some practical considerations and implementations are introduced in the optimization of the layout design of the module.

  • Honggang Sheng; Zheng Chen; Fred Wang; Alan Millner
    2010 Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)
    2010

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    SiC is among the most promising materials for next generation power electronic devices due to its superior physical properties to Si and relative mature technology. SiC MOSFET is expected to offer performance improvement over Si counterpart. This paper presents the characterization of 1.2 kV SiC MOSFET, including its static and dynamic characteristics, and its high-frequency (1 MHz), high-power (1.2 kW) zero-voltage switching (ZVS) operation in a half-bridge parallel resonant converter. In comparison with SiC JFET and Si CoolMOS, the advantages and disadvantages of the SiC MOSFET are summarized.

  • Igor Cvetkovic; Timothy Thacker; Dong Dong; Gerald Francis; Vladimir Podosinov; Dushan Boroyevich; Fred Wang; Rolando Burgos; Glenn Skutt; John Lesko
    2009 IEEE Energy Conversion Congress and Exposition
    2009

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    This paper presents the structure and capabilities of a small, grid-interactive distributed energy resource system comprised of a photovoltaic source, plug-in hybrid electric vehicle, and various local loads. Implemented at the residential level, this system, with a plug-in hybrid electrical vehicle, has the ability to isolate a house from the utility grid (intentionally due to a fault or other abnormal grid conditions), work in the standalone mode, synchronize and reconnect to the utility grid, without load power interruptions. Plug-in hybrid electrical vehicles, with a built-in bidirectional power converter, present the opportunity for demand-response operation in the grid connected mode, whereas in the islanded mode, it can perform frequency and voltage regulation of the power bus. In this paper, system structure and modes of operation are described, and measured results are presented for two main modes of operation and mode transitions.

  • Rixin Lai; Yoann Maillet; Fred Wang; Shuo Wang; Rolando Burgos; Dushan Boroyevich
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    This paper presents a novel integration approach for the EMI choke. The low permeability differential mode (DM) choke is placed within the open window of the common mode (CM) choke. Both chokes share the same winding structure. With the proposed approach, the window area of the toroid core is fully utilized and high DM inductance can be achieved. The small signal measurement was first carried out to demonstrate the design concept and the symmetry of the proposed structure. Then the large signal experimental results verified the attenuation characteristics as well as the thermal performance.

  • Ruxi Wang; Fred Wang; Rixin Lai; Puqi Ning; Rolando Burgos; Dushan Boroyevich
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    It is well known that there exist second-order harmonic current and corresponding ripple voltage on dc bus for single phase PWM rectifiers. The low frequency harmonic current is normally filtered using a bulk capacitor in the bus which results in low power density. This paper studies the energy storage capacitor reduction methods for single phase rectifiers. The minimum ripple energy storage requirement is derived independent of a specific topology. Based on the minimum ripple energy requirement, the feasibility of the active capacitor's reduction schemes is verified. Then, we propose a bidirectional buck-boost converter as our ripple energy storage circuit that can effectively reduce the energy storage capacitance. Simulation and experimental results are provided for verification purposes.

  • Timothy Thacker; Ruxi Wang; Dong Dong; Rolando Burgos; Fred Wang; Dushan Boroyevich
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    A crucial component of a grid-connected converter system is the phase-locked loop (PLL) that synchronizes the control to the grid voltage. Accurate, fast responding PLLs are required to provide phase angle and frequency measurements of the grid voltage for control and protection purposes. This paper proposes novel feedback mechanisms using the estimated frequency and phase in single-phase PLLs (in the stationary and rotating reference frames) which enhances performance. The estimated frequency ripple is eliminated without using low-pass filters (LPFs), and feedback terms are shown to improve the synchronization speed, by as much as 80% in some cases. Mathematical analyses, simulation, and hardware results are presented to verify the methods.

  • Tong Liu; Khai D. T. Ngo; G. Q. Lu; Rolando Burgos; Fred Wang; Dushan Boroyevich
    2009 IEEE Electric Ship Technologies Symposium
    2009

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    The full circuit models of two power modules carrying insulated-gate bipolar transistors (IGBT) are obtained using electro-magnetic simulation. Simulation of the full circuit models shows that the planar IGBT module excels the wire-bonded IGBT module in the current sharing capability. The gate inductances and resistances are found to be 60% less in the planar interconnect module than in the wire-bonded module. As a result, the power module with planar interconnects yields faster response, which decreases the switching energy imbalance caused by the time lags. The variation of the threshold voltages has a significant effect on the switching energy distribution among the devices. The IGBT with lower threshold voltage tends to be turned on earlier and turned off later than the IGBT with higher threshold voltage. Therefore, a substantial amount of current will travel through the IGBT with lower threshold voltage during switching transient. The continuous operation of the power modules leads to junction temperature imbalance on the IGBTs. The thermal imbalance can further cause imbalance of energy dissipation. Simulation shows that the planar module layout can decrease the impact of layout impedances, thermal imbalance, and process variations.

  • Rixin Lai; Fred Wang; Puqi Ning; Di Zhang; Dong Jiang; Rolando Burgos; Dushan Boroyevich; Kamiar J. Karimi; Vikram D. Immanuel
    2009 13th European Conference on Power Electronics and Applications
    2009

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    This paper presents the development and experimental performance of a 10 kW high power density three-phase ac-dc-ac converter. The converter consists of a Vienna-type rectifier front-end and a two-level voltage source inverter (VSI). In order to reduce the switching loss and achieve a high operating junction temperature, a SiC JFET and SiC Schottky diode are utilized. Design considerations for the phase-leg units, gate drivers, integrated input filter-combining EMI and boost inductor stages-and the system protection are described in full detail. Experiments are carried out under different operating conditions, and the results obtained verify the performance and feasibility of the proposed converter system.

  • Fang Luo; M.H.F. Lim; Remi Robutel; Shuo Wang; Fred Wang; Dushan Boroyevich
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    In this paper, the fabrication of LTCC capacitor based on a high dielectric-constant LTCC capacitor paste is introduced. A simple analysis is made for failure modes in fabrication process. Small signal and high voltage performance is tested with a single-layer ceramic capacitor sample to prove the possibility to use it in high power converters.

  • Puqi Ning; Rixin Lai; Daniel Huff; Fred Wang; Khai D. T. Ngo
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    In order to take full advantage of SiC, a high temperature wirebond package for multi-chip phase-leg power module using SiC devices was designed, developed, fabricated and tested. The details of the material selection and thermo-mechanical reliability evaluation are described. High temperature power test shows that the package presented in this paper can perform well at the high junction temperature.

  • Dong Dong; Timothy Thacker; Rolando Burgos; Dushan Boroyevich; Fred Wang; Bill Giewont
    2009 13th European Conference on Power Electronics and Applications
    2009

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    This paper proposes a multi-function control system for single-phase bidirectional PWM converters for renewable energy system applications. A common inner AC current-loop between the different modes helps to facilitate a seamless transition between them, where several individually designed outer loops alternatively perform the different regulation tasks, namely AC voltage, DC voltage, and DC current. The frequency-response based design procedure for the proposed control system is presented in detail for all the converter operating modes, and its performance is verified experimentally using a DSP-controlled 7 kW 120 V AC - 300 V DC laboratory prototype.

  • Dong Dong; Timothy Thacker; Rolando Burgos; Dushan Boroyevich; Fred Wang
    2009 IEEE Energy Conversion Congress and Exposition
    2009

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    This paper compares different control schemes for single-phase PWM inverter to achieve zero steady-state error under large varying load conditions. PR control and load current feedback control improve the steady-state and transient performance respectively. However, the load current feedback control is subject to control stability issue under some load conditions. The PR and synchronous d-q frame control using one type of ldquoimaginaryrdquo component generation method in both current and voltage loops are equivalent. A novel d-q frame control strategy is then proposed eliminating the need for the imaginary component intrinsically. This approach is also applied to a new single-phase PLL system with zero steady-state error.

  • Rixin Lai; Fred Wang; Fang Luo; Rolando Burgos; Dushan Boroyevich
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    This paper identifies a new fault type of non-regenerative three-level boost rectifiers (Vienna-type rectifiers), namely the dc-link voltage-doubling fault. Under this failure mode, the voltage across the dc-link capacitors is doubled when any of the ac switches in the neutral path of the converter is shorted, a unique behavior of three-level neutral-point clamped topologies. Addressing this, two types of protection methods are proposed, discussed and analyzed in this paper, the voltage clamping and the current breaking protection schemes. The impact of the ac inductors on the voltage-doubling phenomenon is studied carefully, and a guideline for the protection scheme selection is provided. This failure mode and the current breaking protection scheme are fully analyzed and verified by simulation and experimental results.

  • Puqi Ning; Thomas G. Lei; Fred Wang; Guo-Quan Lu; Khai D. T. Ngo
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    This work presents the design, development and testing of a phase-leg power module packaged by a novel planar packaging technique for high temperature (250degC) operation. Nano-silver paste is chosen as the die-attach material as well as playing the key functions of electrically connecting the devices' pads. The electrical characteristics of the SiC-based power semiconductors, SiC JFETs and SiC diodes, have been measured and compared before and after packaging. No significant changes are found in the characteristics of all the devices. Prototype module is fabricated and operated up to 400 V, 1.4 kW at junction temperature of 250degC in the continuous power test. Thermo-mechanical reliability has also been investigated by passive cycling the module from -55degC to 250degC. Electrical and mechanical performances of the packaged module are characterized and considered to be reliable for at least 200 cycles.

  • Fang Luo; Remi Robutel; Shuo Wang; Fred Wang; Dushan Boroyevich
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    EMI filters are mainly made up of passive components including capacitors and inductors. These passive components can be a significant portion of the total converter system volume. Integration techniques can be used to improve space utilization and reduce the total system volume. This paper gave a comparison on existing passive integration technologies, and then developed an integrated EMI for 2 kW DC-fed 3-phase motor drive system. Design procedures are established and FEA simulation is used in verifying the design. Both small signal and in circuit EMI noise test were performed to verify the filter design.

  • Zheng Chen; Rolando Burgos; Dushan Boroyevich; Fred Wang; Scott Leslie
    2009 IEEE Electric Ship Technologies Symposium
    2009

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    This paper presents a methodology for modeling the high-voltage silicon carbide (SiC) MOSFET/Junction-Barrier Schottky (JBS) diode power modules. The electrical model of an actual high-voltage SiC MOSFET/JBS module has been obtained using computer-aided electromagnetic analysis and verified through measurements. A circuit simulation model of a 2 kV, 5 A 4-H SiC MOSFET has also been built based on Hefner MOSFET model and the published experimental data. The device and package models are then combined together in the circuit simulation of a double-pulse test. The simulation results obtained provide good insight into the fast switching behavior and parametric dependencies of the paralleled SiC dice, which will aid in the module physical layout and gate driver design, as well as switching and conduction loss analysis.

  • Timothy Thacker; Rolando Burgos; Fred Wang; Dushan Boroyevich
    2009 IEEE Energy Conversion Congress and Exposition
    2009

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    Active islanding detection schemes are useful to avoid energizing local power systems during fault and grid failure conditions. These types of islanding conditions not only lead to unsafe and unreliable power delivery to the loads and grid, but can cause damage to equipment as well as raising safety concerns for workers and users. This work presents a method of active islanding detection for single-phase converter systems via the stability of a controller's phase-locked loop. This method inherently detects islanding conditions without applying perturbations at the converter output to test for islanding conditions-as other active methods do-thus avoiding the injection of distortions into the grid. Analytical, simulated and experimental results are presented for verification of the proposed method.

  • Di Zhang; Fred Wang; Rolando Burgos; Dushan Boroyevich
    2009 IEEE Energy Conversion Congress and Exposition
    2009

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    This paper presents the control method of common mode (CM) circulating current of paralleled three-phase two-level voltage-source converters (VSCs) with discontinuous space-vector modulation (DPWM) and interleaving. First, different inductor structures are compared and based on the comparison a new inductor structure with integrated inter-phase inductor and boost inductors is proposed. After that, the main reason of CM circulating current jump in the paralleled VSCs system is analyzed first when DPWM and interleaving are used together. The amplitude of such jump caused by the overlap between different zero vectors relates to system modulation index and interleaving angle. After that, the control method to mitigate such jump by avoiding the overlap of different zero vectors is explained. In addition, for the proposed inductor structure, the method to minimize the core flux by controlling the CM circulating current is shown. Both of the control methods will only introduce very limited additional switching actions, not affecting the system thermal design much. Experimental results have verified the analysis and the feasibility of the control methods.

  • Luis Arnedo; Rolando Burgos; Dushan Boroyevich; Fred Wang
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    This paper presents the application of black-box terminal characterization models (BBTC) for the simulation and analysis of distributed power electronics systems composed by commercial power electronics converters and filter modules. The models are shown to effectively predict the transient and steady state response of interconnected distributed power systems. They are also used to predict the small-signal stability between source and load converters. All simulation results are validated with experimental data.

  • Zhiyu Shen; Rolando Burgos; Dushan Boroyevich; Fred Wang
    2009 IEEE Electric Ship Technologies Symposium
    2009

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    This paper analyzes the ZVS soft-switching region of a DAB converter with arbitrary operating waveforms. The effect of the junction capacitor of the device and the magnetizing inductance of the transformer are also analyzed. Through the analysis, a group of waveforms for different loading conditions are identified to maximize the ZVS operating region. The results are verified by simulation using real device models.

  • Zheng Chen; Dushan Boroyevich; Rolando Burgos; Fred Wang
    2009 IEEE Energy Conversion Congress and Exposition
    2009

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    This paper presents a generic and complete process to characterize and model the newly developed silicon carbide (SiC) MOSFET. The static characteristics, including MOSFET I-V curves, body diode, nonlinear junction capacitances, as well as package stray inductances, have been fully characterized on a prototype 1.2 kV, 20 A SiC MOSFET under varying temperature from 25degC to 200degC. Characteristics particular to the SiC MOSFET and its advantages over the silicon counterparts are analyzed and explained. The switching performance of the device, on the other hand, has also been tested under room temperature using a specially designed double-pulse tester with minimized circuit parasitics. The characterization results are then used to build a SiC MOSFET model using the MOSFET modeling tool in Synopsys Saber. Finally, discussions are presented on how to improve the model accuracy in its switching behavior by obtaining static characteristics from switching waveforms.

  • Di Zhang; Fred Wang; Rolando Burgos; John Kern; Said El-Barbari; Dushan Boroyevich
    2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition
    2009

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    This paper presented a systematic analysis of the protection methods for paralleled VSCs system especially with common DC bus from four types of internal faults, including short or open circuit faults of single switch or diode. The potential damages of such faults relating to circulating current were first explained. After that internal faults detection and isolation schemes based on de-saturation and circulating currents were shown in detail. The study confirmed that if the system can be shut down for a short period, SCRs can be used to recovery the system from internal faults with one redundant VSC. Otherwise, the topology with isolated DC buses for each VSC or other fast DC current breakers should be used. Finally, experimental results using a 2+1 VSCs system validated the analysis and protection schemes.

  • Rolando Burgos; Zheng Chen; Dushan Boroyevich; Fred Wang
    2009 IEEE Energy Conversion Congress and Exposition
    2009

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    This paper presents detailed design considerations of an ultra fast gate-drive circuit for 1.2 kV SiC JFET devices in phase-leg configuration using 0-Omega gate resistance. The proposed gate-drive achieved turn-on and turn-off times in the range of 12 to 55 ns operating from a 600 V dc bus with an inductive load of 10 A, and junction temperatures varying from 25deg to 200degC. An in-depth experimental evaluation is presented as well fully characterizing the performance attained by the proposed gate-drive circuit.

  • Dushan Boroyevich; Fred. C. Lee; J. Daan van Wyk; Guo-Quan Lu; Elaine P. Scott; Ming Xu; Rolando Burgos; Fred Wang; Thomas M. Jahns; Thomas A. Lipo; Robert D. Lorenz; T. Paul Chow
    5th International Conference on Integrated Power Electronics Systems
    2008

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    Center for Power Electronics Systems (CPES) was established in 1998 with the mission to develop advanced electronic power conversion technologies for efficient future electric energy utilization through multidisciplinary engineering research and education. The CPES vision has been to enable dramatic improvements in the performance, reliability, and cost-effectiveness of electric energy processing systems by developing an integrated system approach via integrated power electronics modules (IPEMs). The IPEM-based system solutions address, concurrently, the integration of active and passive components, packaging materials, interconnect structures, electromagnetic compatibility and electromagnetic interference, thermal management, numerous application considerations, as well as system integration by incorporating integrated design methodology. This paper summarizes in the form of brief "nuggets" some of the major CPES contributions over the last ten years in all of these areas.

  • Shuo Wang; Yoann Yorrick Maillet; Fred Wang; Rixin Lai; Rolando Burgos; Fang Luo
    2008 IEEE Power Electronics Specialists Conference
    2008

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    It is difficult to suppress high-frequency common mode (CM) EMI noise in power electronics systems. CM filters are used to suppress CM noise, but their performance is greatly affected by the effectiveness of their grounding. In this paper, the grounding issues for EMI filters, such as the mutual inductance between two grounding paths are discussed. The paper then discusses and analyzes several grounding approaches. Based on this investigation, guidelines for efficient grounding are proposed. Experiments are then carried out to verify the theoretical analysis.

  • Di Zhang; Fred Wang; Rolando Burgos; Rixin Lai; Tim Thacker; Dushan Boroyevich
    2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition
    2008

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    This paper presents a complete analysis studying the impact of interleaving on harmonic current in DC passive components for paralleled three-phase voltage-source converters (VSCs). The analysis performed considers the effects of modulation index, displacement angle, and the interleaving angle. The results show that the harmonic current in DC capacitor depends strongly on displacement angle, and to minimize the harmonic current interleaving angle should vary from pi/2 to pi as the displacement angle varies from zero (unity power factor) to pi/2 (zero power factor). The modulation index can also affect the impact much. Because of the limit of the pages, the impact of interleaving on harmonic current in AC boost inductor is only shown in principle. All the analysis is based on an example system containing two VSCs. However the proposed analysis method in frequency domain is easily expandable for multiple paralleled VSCs. Experimental results have verified the analysis results.

  • Fred Wang; Yunqing Pei; Dushan Boroyevich; Rolando Burgos; Khai Ngo
    2008 34th Annual Conference of IEEE Industrial Electronics
    2008

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    This paper compares AC and DC transmission schemes for power delivery between land-based and off-shore installations. The comparison is focused on the loss, as well as on the technologies needed for each of these systems. The study shows that both AC and DC schemes can provide feasible solutions for off-shore applications. Specifically, it is shown through analysis and simulation, that DC distribution always results in lower loss for a given voltage level and a given transmission cable. In fact, depending on the voltage and cable parameters, the DC system loss could be as low as 15 to 50% of that of the corresponding AC system. The latter loss nonetheless could be reduced by the use of proper compensation at the expense of an increased complexity and cost. The study also shows that higher voltages are desirable for high power and long distance power distribution. This is advantageous for the AC scheme, which can readily use transformers at both sending and receiving ends, but represents a disadvantage for the DC case given that high-voltage DC-DC converters are a less mature technology. To this end, a modular converter topology is proposed that could be used for high voltage DC power delivery achieving a lower cost and size, better controllability, and higher reliability.

  • Shuo Wang; Yoann Yorrick Maillet; Fred Wang; Dushan Boroyevich
    2008 IEEE Power Electronics Specialists Conference
    2008

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    This paper first analyzes the common mode (CM) noise in a motor drive system. Based on the CM noise model, both CM noise voltage cancellation and CM noise current cancellation, which includes feedback and feed-forward current cancellations, are investigated. The feed-forward current cancellation is implemented and tested. It is found that due to the speed and gain bandwidth limitations, the active filter cannot suppress high di/dt and high amplitude CM noise current. Hybrid EMI filters which include a passive filter and an active filter is proposed and designed. The experiments show that the CM inductance of the passive filter can be reduced by 10 times because the active filter can well suppress low frequency noise.

  • Yi Wang; Callaway Cass; Ke Tang; Harsh Naik; T. Paul Chow; Dushan Boroyevich; Fred Wang
    2008 IEEE Power Electronics Specialists Conference
    2008

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    Silicon carbide (SiC), with its high critical electric field property and the capability of operation at high temperature, has attracted much attention and shown to be a promising semiconductor material for high power devices. Some of the most widely used devices in power circuits are the JFETs and the MOSFETs. Based on characterization of high voltage 4H-SiC JFET and MOSFET, this work compares the using of these two kinds of devices in power systems from both electrical and thermal points of view and compact models are developed for circuit simulations.

  • Xibo Yuan; Fred Wang; Rolando Burgos; Yongdong Li; Dushan Boroyevich
    2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition
    2008

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    In this paper, permanent magnet wind generator with full power converter is investigated in weak grid systems, where the dc-link voltage needs to be controlled from the generator side instead of grid side. When wind power takes a large portion of grid power, it needs to help grid to regulate the voltage and frequency. To achieve this, a variable step search algorithm based on the derivation of the electro-mechanical dynamic model describing the wind turbine is proposed, which enables the wind generator output power to match the load power, thus keeping the dc-link voltage regulated. Based on the non-linearity and different slopes of wind power curve, the controller is designed specifically for different sectors. A back-EMF observer based sensor-less generator control is adopted here to regulate the generator speed. Simulation is built up with a 10 kW wind power generator system and a reduced-scale 1.5 kW system experiment is also carried out in the condition of load power step change and wind speed change. Both simulation and experimental results validate the effectiveness of the proposed control scheme, where the dc-link voltage can be kept stable by adjusting the wind generator speed.

  • Callaway J. Cass; Rolando Burgos; Fred Wang; Dushan Boroyevich
    2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition
    2008

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    The charge control method is a suitable control scheme for achieving high switching frequency for the three-phase buck rectifier. Key improvements are made to the original control scheme allowing for input power factor compensation and the improvement of the input current waveform quality in the presence of an EMI filter. The modified control scheme is demonstrated using a 2 kW SiC JFET-based buck rectifier with 150 kHz switching frequency.

  • Luis Arnedo; Dushan Boroyevich; Rolando Burgos; Fred Wang
    2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition
    2008

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    Black-box terminal characterization models are constructed from "un-terminated" frequency response functions (FRF) measured at the converter terminals without requiring explicit knowledge of any of the converter parameters; however to some extent, these measurements are always coupled with the source and load dynamics which reduces the fidelity of the final models obtained. This paper analyzes this problem and proposes a methodology to obtain un-terminated FRFs for dc-dc converters in the presence of source and load coupled FRF measurements. Furthermore, it presents a model order reduction technique to enable the simulation of dc distributed power systems with a large number of converters, applied to the calculated un-terminated FRFs that constitute the black-box models in question. Experimental results are presented to verify the theoretical analysis and the high accuracy obtained with the black-box models built.

  • Luis Arnedo; Dushan Boroyevich; Rolando Burgos; Fred Wang
    2008 IEEE Power Electronics Specialists Conference
    2008

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    The objective of this work is to develop modular black-box converter models for system-level design and analysis that are valid in a wide variety of operating conditions. The approach used to address this problem is to divide the converter operating space into sub-spaces. For each sub-space, a linear local model is constructed from frequency response functions (FRFs) measured at the converter terminals. The FRFs are then post processed using system identification, the linear models obtained are valid as a local representation of the converter intrinsic dynamic at that operating condition. In the regions where two or more adjacent linear models overlap, an appropriate weighting is applied between them to produce an accurate approximation of the measured data. This new structure allows the characterization of converters with rich nonlinear dynamics, such as an unregulated dc-dc bus converter working near the boundary region between discontinuous and continuous conduction modes or a regulated flyback dc-dc converter. These two converters are effectively modeled with the proposed approach, and its models are presented in detail, providing an in-depth description of their implementation as well as their extensive experimental validation with laboratory prototypes.

  • Puqi Ning; Guangyin Lei; Fred Wang; Khai D. T. Ngo
    2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition
    2008

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    In the design of a high power density heatsink-fan cooling system, it is vital to understand how the geometry of the heatsink and the operating point of a fan affect the thermal performance. An analytical model has been developed for predicting the heatsink-fan system performance. There is a detailed optimization process to minimize the total weight. A typical mathematical optimization example is presented, and the results are verified via numerical simulations and experiments.

  • Rixin Lai; Fred Wang; Rolando Burgos; Dushan Boroyevich
    2008 IEEE Power Electronics Specialists Conference
    2008

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    In this paper, a novel voltage balance control scheme with carrier-based implementation is proposed for the non-regenerative three-level boost (or Vienna type) rectifier. The dc-link voltage balance mechanism for the non-regenerative three-level boost rectifier is first studied from the space vector standpoint and then an optimal zero sequence component is found to guarantee zero neutral point current injection. Based on this analysis the voltage balance control is designed with the combination of a feed forward component and a feedback loop, which can be easily incorporated into the conventional multi-loop d-q controller and then implemented by carrier-based modulation. The impact of the optimal zero sequence on the feasible modulation index is also analyzed. The proposed approach features great simplicity and good dc link voltage balance regulation. Both simulations and experiments are carried out and the results verify the feasibility of this proposed control algorithm.

  • Rixin Lai; Fred Wang; Rolando Burgos; Dushan Boroyevich
    2008 34th Annual Conference of IEEE Industrial Electronics
    2008

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    In this paper, a new average d-q model for the non-regenerative three-level boost rectifier is proposed. The state space analysis is first carried out and an optimal zero sequence injection is found from the perspective of DC-link voltage balance or neutral point control. By utilizing this zero component the equilibrium point of the neutral point voltage is established and then the behavior of the voltage balance can be modeled in the d-q coordinate. Based on the proposed model, a controller with carrier-based implementation is developed, which features great simplicity and good DC-link voltage balance regulation. Both simulation and experimental results verified the feasibility of the proposed model and control approach.

  • Honggang Sheng; Yunqing Pei; Fred Wang
    2008 IEEE Power Electronics Specialists Conference
    2008

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    Resonant converters are popular for high power density applications because of their advantages over pulse-width modulation (PWM) converters. For a given resonant converter, the resonant tank has different structures when the transformer position is changed in the resonant tank. Without any changes in resonant tank design or influencing system performance, the difference in transformer positions significantly affects the voltage and current stress on the transformer, and thus the transformer volume. The voltage and current stresses on the transformer as well as the influence on the resonant components are summarized, and three possible basic resonant converters are compared for use; the series resonant converter (SRC), the parallel resonant converter (PRC) and the series parallel resonant converter (SPRC). Suitable structures for high power density applications are discussed, and a PRC with two different resonant structures is implemented for experimental verification.

  • Honggang Sheng; Fred Wang; C. W. Tipton
    2008 Twenty-Third Annual IEEE Applied Power Electronics Conference and Exposition
    2008

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    This paper presents a novel protection method for three-level converters. The three-level converter is subject to voltage unbalance, which can result in switch overvoltage and system failure. This abnormal phenomenon can be detected by monitoring the voltage across the flying capacitor (Vcss). Based on simulation analysis, monitoring the Vcss is also an effective way to detect various system faults, including shoot-through. Using the Vcss as the signal for fault detection, the proposed protection scheme can improve the system reliability without any additional components on the power stage and impact on the performance. The protection method can not only protect the system against unbalanced voltage stresses on the switches, but also provide a remedy for the system as faults happen. Furthermore, under/over input voltage lockout can be replaced by the proposed protection scheme. The verification is performed by the experiment with a three-level parallel resonant converter.

  • Rixin Lai; Yunqing Pei; Fred Wang; Rolando Burgos; Dushan Boroyevich; T. A. Lipo; Vikram Immanuel; Kamiar Karimi
    2007 IEEE International Electric Machines & Drives Conference
    2007

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    This paper presents a systematic evaluation approach for AC-fed converter topologies. Using light-weight as the comparison metric, the proposed approach considers the contribution of all major parts in a converter system. With the proposed scheme four converter topologies, back-to-back voltage source converter (B2B-VSC), Vienna rectifier plus voltage source inverter (VSI), back-to-back current source converter (B2B-CSQ and matrix converter, are analyzed and compared for a high weight density motor drive using SiC devices. Compared with the previous work on topology evaluation, the impacts of the switching frequency and the failure mode are studied and evaluated. The results show that Vienna rectifier plus VSI working in 40 kHz can has the best weight performance with the conditions specified in this paper.

  • Rixin Lai; Fred Wang; Yunqing Pei; Rolando Burgos; Boroyevich Dushan
    2007 IEEE Power Electronics Specialists Conference
    2007

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    This paper develops design methodology for finding the lower bound of the passive components for AC back-to-back voltage source converters. Compared with numerous previous works focusing on energy storage passives, the proposed approach considers input EMI filters and various operating modes. The spectrum of the pulsating phase-leg voltage with discontinuous space vector modulation scheme (DPWM) is analyzed, based on which the relationship between the switching frequency and the EMI filter parameters is studied. Then the rules for selecting line inductance and DC link capacitance are derived from the consideration of the current ripple and system stability requirement. The impact of DC link ripple current and failure mode operation is also included. The experiment system is constructed and the results show the feasibility of implementing the minimum passive components.